📄 cnt_nuevo.vhd
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library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity cnt is
generic (
nb_width : integer:=6;
nb_lenght : integer:=6;
width : integer:= 63;
lenght: integer:= 63
);
port (
asinc_reset, enable_cnt : in std_logic;
i : in std_logic_vector(nb_width-1 downto 0);
j : in std_logic_vector(nb_lenght-1 downto 0);
fila : out std_logic_vector(nb_lenght-1 downto 0);
columna : out std_logic_vector(nb_width-1 downto 0);
desborde : out std_logic
);
end cnt;
architecture cnt_arch of cnt is
type state_values is(st0,st1,st2,st3,st4,st5,st6,st7,st8);
signal estado_presente, estado_futuro : state_values;
signal aux_desborde : std_logic;
signal aux_fil : std_logic_vector(nb_width-1 downto 0);
signal aux_col : std_logic_vector(nb_width-1 downto 0);
begin
comb : process(estado_presente, i, j)
begin
case estado_presente is
when st0 =>
if (i = "000000" or j = "000000") then
aux_desborde <= '1';
aux_fil <= i;
aux_col <= j;
else
aux_desborde <= '0';
aux_fil <= i-'1';
aux_col <= j-'1';
end if;
estado_futuro <= st1;
when st1 =>
aux_col <= j;
if(i = "000000") then
aux_desborde <= '1';
aux_fil <= i;
else
aux_desborde <= '0';
aux_fil <= i-'1';
end if;
estado_futuro <= st2;
when st2 =>
if(i = "000000" or j = width) then
aux_desborde <= '1';
aux_fil <= i;
aux_col <= j;
else
aux_desborde <= '0';
aux_fil <= i-'1';
aux_col <= j+'1';
end if;
estado_futuro <= st3;
when st3 =>
aux_fil <= i;
if(j = "000000") then
aux_desborde <= '1';
aux_col <= j;
else
aux_desborde <= '0';
aux_col <= j-'1';
end if;
estado_futuro <= st4;
when st4 =>
aux_desborde <= '0';
aux_fil <= i;
aux_col <= j;
estado_futuro <= st5;
when st5 =>
aux_fil <= i;
if(j = width) then
aux_desborde <= '1';
aux_col <= j;
else
aux_desborde <= '0';
aux_col <= j+'1';
end if;
estado_futuro <= st6;
when st6 =>
if(i= lenght or j = "000000") then
aux_desborde <= '1';
aux_fil <= i;
aux_col <= j;
else
aux_desborde <= '0';
aux_fil <= i+'1';
aux_col <= j-'1';
end if;
estado_futuro <= st7;
when st7 =>
aux_col <= j;
if(i= lenght) then
aux_desborde <= '1';
aux_fil <= i;
else
aux_desborde <= '0';
aux_fil <= i+'1';
end if;
estado_futuro <= st8;
when st8 =>
if(i = lenght or j = width) then
aux_desborde <= '1';
aux_fil <= i;
aux_col <= j;
else
aux_desborde <= '0';
aux_fil <= i+'1';
aux_col <= j+'1';
end if;
estado_futuro <= st0;
end case;
end process comb;
sec : process (enable_cnt, asinc_reset, aux_fil, aux_col, aux_desborde)
begin
if(asinc_reset='1') then
estado_presente <= st0;
fila <= (others =>'0');
columna <= (others =>'0');
desborde <= '0';
elsif(enable_cnt ='1' and enable_cnt'event) then
estado_presente <= estado_futuro;
fila <= aux_fil;
columna <= aux_col;
desborde <= aux_desborde;
end if;
end process sec;
end cnt_arch;
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