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📄 my_async_fifo.edn

📁 XILINX的FPGA实现的双口ram源码
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(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2005 5 13 14 52 33)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 7.1.02i"))))
   (comment "                                                                                
      This file is owned and controlled by Xilinx and must be used              
      solely for design, simulation, implementation and creation of             
      design files limited to Xilinx devices or technologies. Use               
      with non-Xilinx devices or technologies is expressly prohibited           
      and immediately terminates your license.                                  
                                                                                
      XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'             
      SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                   
      XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION           
      AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION               
      OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                 
      IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                   
      AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE          
      FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                  
      WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                   
      IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR            
      REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF           
      INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS           
      FOR A PARTICULAR PURPOSE.                                                 
                                                                                
      Xilinx products are not intended for use in life support                  
      appliances, devices, or systems. Use in such applications are             
      expressly prohibited.                                                     
                                                                                
      (c) Copyright 1995-2004 Xilinx, Inc.                                      
      All rights reserved.                                                      
                                                                                
   ")
   (comment "Core parameters: ")
       (comment "c_use_blockmem = 1 ")
       (comment "c_rd_count_width = 2 ")
       (comment "c_has_wr_ack = 1 ")
       (comment "c_has_almost_full = 1 ")
       (comment "c_has_wr_err = 1 ")
       (comment "c_wr_err_low = 0 ")
       (comment "c_wr_ack_low = 0 ")
       (comment "c_data_width = 16 ")
       (comment "c_enable_rlocs = 0 ")
       (comment "c_rd_err_low = 0 ")
       (comment "c_rd_ack_low = 0 ")
       (comment "c_wr_count_width = 2 ")
       (comment "InstanceName = my_async_fifo ")
       (comment "c_has_rd_count = 1 ")
       (comment "c_has_almost_empty = 1 ")
       (comment "c_has_rd_ack = 1 ")
       (comment "c_has_wr_count = 1 ")
       (comment "c_fifo_depth = 15 ")
       (comment "c_has_rd_err = 1 ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
       (cell FDC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CLR (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell FDCE (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CE (direction INPUT))
                   (port CLR (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell FDP (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port PRE (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell FDPE (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port D (direction INPUT))
                   (port C (direction INPUT))
                   (port CE (direction INPUT))
                   (port PRE (direction INPUT))
                   (port Q (direction OUTPUT))
               )
           )
       )
       (cell LUT4 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port I0 (direction INPUT))
                   (port I1 (direction INPUT))
                   (port I2 (direction INPUT))
                   (port I3 (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
       (cell MUXCY_D (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port O (direction OUTPUT))
                   (port LO (direction OUTPUT))
               )
           )
       )
       (cell MUXCY_L (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port DI (direction INPUT))
                   (port CI (direction INPUT))
                   (port S (direction INPUT))
                   (port LO (direction OUTPUT))
               )
           )
       )
       (cell RAMB16_S18_S18 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port WEA (direction INPUT))
                   (port ENA (direction INPUT))
                   (port SSRA (direction INPUT))
                   (port CLKA (direction INPUT))
                   (port (rename DIA_0_ "DIA<0>") (direction INPUT))
                   (port (rename DIA_1_ "DIA<1>") (direction INPUT))
                   (port (rename DIA_2_ "DIA<2>") (direction INPUT))
                   (port (rename DIA_3_ "DIA<3>") (direction INPUT))
                   (port (rename DIA_4_ "DIA<4>") (direction INPUT))
                   (port (rename DIA_5_ "DIA<5>") (direction INPUT))
                   (port (rename DIA_6_ "DIA<6>") (direction INPUT))
                   (port (rename DIA_7_ "DIA<7>") (direction INPUT))
                   (port (rename DIA_8_ "DIA<8>") (direction INPUT))
                   (port (rename DIA_9_ "DIA<9>") (direction INPUT))
                   (port (rename DIA_10_ "DIA<10>") (direction INPUT))
                   (port (rename DIA_11_ "DIA<11>") (direction INPUT))
                   (port (rename DIA_12_ "DIA<12>") (direction INPUT))
                   (port (rename DIA_13_ "DIA<13>") (direction INPUT))
                   (port (rename DIA_14_ "DIA<14>") (direction INPUT))
                   (port (rename DIA_15_ "DIA<15>") (direction INPUT))
                   (port (rename DOA_0_ "DOA<0>") (direction OUTPUT))
                   (port (rename DOA_1_ "DOA<1>") (direction OUTPUT))
                   (port (rename DOA_2_ "DOA<2>") (direction OUTPUT))
                   (port (rename DOA_3_ "DOA<3>") (direction OUTPUT))
                   (port (rename DOA_4_ "DOA<4>") (direction OUTPUT))
                   (port (rename DOA_5_ "DOA<5>") (direction OUTPUT))
                   (port (rename DOA_6_ "DOA<6>") (direction OUTPUT))
                   (port (rename DOA_7_ "DOA<7>") (direction OUTPUT))
                   (port (rename DOA_8_ "DOA<8>") (direction OUTPUT))
                   (port (rename DOA_9_ "DOA<9>") (direction OUTPUT))
                   (port (rename DOA_10_ "DOA<10>") (direction OUTPUT))
                   (port (rename DOA_11_ "DOA<11>") (direction OUTPUT))
                   (port (rename DOA_12_ "DOA<12>") (direction OUTPUT))
                   (port (rename DOA_13_ "DOA<13>") (direction OUTPUT))
                   (port (rename DOA_14_ "DOA<14>") (direction OUTPUT))
                   (port (rename DOA_15_ "DOA<15>") (direction OUTPUT))
                   (port (rename ADDRA_0_ "ADDRA<0>") (direction INPUT))
                   (port (rename ADDRA_1_ "ADDRA<1>") (direction INPUT))
                   (port (rename ADDRA_2_ "ADDRA<2>") (direction INPUT))
                   (port (rename ADDRA_3_ "ADDRA<3>") (direction INPUT))
                   (port (rename ADDRA_4_ "ADDRA<4>") (direction INPUT))
                   (port (rename ADDRA_5_ "ADDRA<5>") (direction INPUT))
                   (port (rename ADDRA_6_ "ADDRA<6>") (direction INPUT))
                   (port (rename ADDRA_7_ "ADDRA<7>") (direction INPUT))
                   (port (rename ADDRA_8_ "ADDRA<8>") (direction INPUT))
                   (port (rename ADDRA_9_ "ADDRA<9>") (direction INPUT))
                   (port (rename DIPA_0_ "DIPA<0>") (direction INPUT))
                   (port (rename DIPA_1_ "DIPA<1>") (direction INPUT))
                   (port (rename DOPA_0_ "DOPA<0>") (direction OUTPUT))
                   (port (rename DOPA_1_ "DOPA<1>") (direction OUTPUT))
                   (port WEB (direction INPUT))
                   (port ENB (direction INPUT))
                   (port SSRB (direction INPUT))
                   (port CLKB (direction INPUT))
                   (port (rename DIB_0_ "DIB<0>") (direction INPUT))
                   (port (rename DIB_1_ "DIB<1>") (direction INPUT))
                   (port (rename DIB_2_ "DIB<2>") (direction INPUT))
                   (port (rename DIB_3_ "DIB<3>") (direction INPUT))
                   (port (rename DIB_4_ "DIB<4>") (direction INPUT))
                   (port (rename DIB_5_ "DIB<5>") (direction INPUT))
                   (port (rename DIB_6_ "DIB<6>") (direction INPUT))
                   (port (rename DIB_7_ "DIB<7>") (direction INPUT))
                   (port (rename DIB_8_ "DIB<8>") (direction INPUT))
                   (port (rename DIB_9_ "DIB<9>") (direction INPUT))
                   (port (rename DIB_10_ "DIB<10>") (direction INPUT))
                   (port (rename DIB_11_ "DIB<11>") (direction INPUT))
                   (port (rename DIB_12_ "DIB<12>") (direction INPUT))
                   (port (rename DIB_13_ "DIB<13>") (direction INPUT))
                   (port (rename DIB_14_ "DIB<14>") (direction INPUT))
                   (port (rename DIB_15_ "DIB<15>") (direction INPUT))
                   (port (rename DOB_0_ "DOB<0>") (direction OUTPUT))
                   (port (rename DOB_1_ "DOB<1>") (direction OUTPUT))
                   (port (rename DOB_2_ "DOB<2>") (direction OUTPUT))
                   (port (rename DOB_3_ "DOB<3>") (direction OUTPUT))
                   (port (rename DOB_4_ "DOB<4>") (direction OUTPUT))
                   (port (rename DOB_5_ "DOB<5>") (direction OUTPUT))
                   (port (rename DOB_6_ "DOB<6>") (direction OUTPUT))
                   (port (rename DOB_7_ "DOB<7>") (direction OUTPUT))
                   (port (rename DOB_8_ "DOB<8>") (direction OUTPUT))
                   (port (rename DOB_9_ "DOB<9>") (direction OUTPUT))
                   (port (rename DOB_10_ "DOB<10>") (direction OUTPUT))
                   (port (rename DOB_11_ "DOB<11>") (direction OUTPUT))
                   (port (rename DOB_12_ "DOB<12>") (direction OUTPUT))
                   (port (rename DOB_13_ "DOB<13>") (direction OUTPUT))
                   (port (rename DOB_14_ "DOB<14>") (direction OUTPUT))
                   (port (rename DOB_15_ "DOB<15>") (direction OUTPUT))
                   (port (rename ADDRB_0_ "ADDRB<0>") (direction INPUT))
                   (port (rename ADDRB_1_ "ADDRB<1>") (direction INPUT))
                   (port (rename ADDRB_2_ "ADDRB<2>") (direction INPUT))
                   (port (rename ADDRB_3_ "ADDRB<3>") (direction INPUT))
                   (port (rename ADDRB_4_ "ADDRB<4>") (direction INPUT))
                   (port (rename ADDRB_5_ "ADDRB<5>") (direction INPUT))
                   (port (rename ADDRB_6_ "ADDRB<6>") (direction INPUT))
                   (port (rename ADDRB_7_ "ADDRB<7>") (direction INPUT))
                   (port (rename ADDRB_8_ "ADDRB<8>") (direction INPUT))
                   (port (rename ADDRB_9_ "ADDRB<9>") (direction INPUT))
                   (port (rename DIPB_0_ "DIPB<0>") (direction INPUT))
                   (port (rename DIPB_1_ "DIPB<1>") (direction INPUT))
                   (port (rename DOPB_0_ "DOPB<0>") (direction OUTPUT))
                   (port (rename DOPB_1_ "DOPB<1>") (direction OUTPUT))
               )
           )
       )
       (cell XORCY (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port LI (direction INPUT))
                   (port CI (direction INPUT))
                   (port O (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell my_async_fifo
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( array ( rename din "din<15:0>") 16 ) (direction INPUT))
   (port ( rename wr_en "wr_en") (direction INPUT))
   (port ( rename wr_clk "wr_clk") (direction INPUT))
   (port ( rename rd_en "rd_en") (direction INPUT))
   (port ( rename rd_clk "rd_clk") (direction INPUT))
   (port ( rename ainit "ainit") (direction INPUT))
   (port ( array ( rename dout "dout<15:0>") 16 ) (direction OUTPUT))
   (port ( rename full "full") (direction OUTPUT))
   (port ( rename empty "empty") (direction OUTPUT))
   (port ( rename almost_full "almost_full") (direction OUTPUT))
   (port ( rename almost_empty "almost_empty") (direction OUTPUT))
   (port ( array ( rename wr_count "wr_count<1:0>") 2 ) (direction OUTPUT))
   (port ( array ( rename rd_count "rd_count<1:0>") 2 ) (direction OUTPUT))
   (port ( rename rd_ack "rd_ack") (direction OUTPUT))
   (port ( rename rd_err "rd_err") (direction OUTPUT))
   (port ( rename wr_ack "wr_ack") (direction OUTPUT))
   (port ( rename wr_err "wr_err") (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance B8
      (viewRef view_1 (cellRef RAMB16_S18_S18 (libraryRef xilinxun)))
      (property INIT_00 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_01 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_02 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_03 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_04 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_05 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_06 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_07 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_08 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_09 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0A (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0B (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0C (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0D (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_0F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_10 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_11 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_12 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_13 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_14 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_15 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_16 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_17 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_18 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_19 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_1A (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_1B (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_1C (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_1D (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_1E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_1F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_20 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_21 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_22 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_23 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_24 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_25 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_26 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_27 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_28 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_29 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2A (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2B (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2C (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2D (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2E (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_2F (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_30 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_31 (string "0000000000000000000000000000000000000000000000000000000000000000"))
      (property INIT_32 (string "0000000000000000000000000000000000000000000000000000000000000000"))

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