transcript

数字钟的实现

# Reading C:/Modeltech_xe/tcl/vsim/pref.tcl 
# do s59_tw.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim XE II vcom 5.7g Compiler 2003.10 Oct 13 2003
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity s59
# -- Compiling architecture behavioral of s59
# Model Technology ModelSim XE II vcom 5.7g Compiler 2003.10 Oct 13 2003
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package textio
# -- Loading package std_logic_textio
# -- Compiling entity s59_tw
# -- Compiling architecture testbench_arch of s59_tw
# -- Loading entity s59
# -- Compiling configuration s59_cfg
# -- Loading entity s59_tw
# -- Loading architecture testbench_arch of s59_tw
# vsim -lib work -t 1ps s59_tw 
# Loading C:/Modeltech_xe/win32xoem/../std.standard
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_1164(body)
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_arith(body)
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_unsigned(body)
# Loading C:/Modeltech_xe/win32xoem/../std.textio(body)
# Loading C:/Modeltech_xe/win32xoem/../ieee.std_logic_textio(body)
# Loading work.s59_tw(testbench_arch)
# Loading work.s59(behavioral)
# .wave
# .structure
# .signals
# ** Failure: Simulation successful (not a failure).  No problems detected. 
#    Time: 1110 ns  Iteration: 0  Process: /s59_tw/line__71 File: s59_tw.vhw
# Break at s59_tw.vhw line 165
# Simulation Breakpoint: Break at s59_tw.vhw line 165
# MACRO ./s59_tw.fdo PAUSED at line 13
destroy .wave