clockout.bsf

基于Altera公司系列FPGA(Cyclone EP1C3T144C8)、Verilog HDL、MAX7219数码管显示芯片、4X4矩阵键盘、TDA2822功放芯片及扬声器等实现了《电子线路设计&

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
	(rect 16 16 184 176)
	(text "ClockOut" (rect 5 0 51 12)(font "Arial" ))
	(text "inst" (rect 8 144 25 156)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "ClkIn10mhz" (rect 0 0 57 12)(font "Arial" ))
		(text "ClkIn10mhz" (rect 21 27 78 39)(font "Arial" ))
		(line (pt 0 32)(pt 16 32)(line_width 1))
	)
	(port
		(pt 0 48)
		(input)
		(text "Reset" (rect 0 0 29 12)(font "Arial" ))
		(text "Reset" (rect 21 43 50 55)(font "Arial" ))
		(line (pt 0 48)(pt 16 48)(line_width 1))
	)
	(port
		(pt 168 32)
		(output)
		(text "ClkOut7219" (rect 0 0 57 12)(font "Arial" ))
		(text "ClkOut7219" (rect 90 27 147 39)(font "Arial" ))
		(line (pt 168 32)(pt 152 32)(line_width 1))
	)
	(port
		(pt 168 48)
		(output)
		(text "ClkOutTime" (rect 0 0 57 12)(font "Arial" ))
		(text "ClkOutTime" (rect 90 43 147 55)(font "Arial" ))
		(line (pt 168 48)(pt 152 48)(line_width 1))
	)
	(port
		(pt 168 64)
		(output)
		(text "ClkOut1Hz" (rect 0 0 53 12)(font "Arial" ))
		(text "ClkOut1Hz" (rect 94 59 147 71)(font "Arial" ))
		(line (pt 168 64)(pt 152 64)(line_width 1))
	)
	(port
		(pt 168 80)
		(output)
		(text "ClkOutLow" (rect 0 0 53 12)(font "Arial" ))
		(text "ClkOutLow" (rect 94 75 147 87)(font "Arial" ))
		(line (pt 168 80)(pt 152 80)(line_width 1))
	)
	(port
		(pt 168 96)
		(output)
		(text "ClkOutHigh" (rect 0 0 56 12)(font "Arial" ))
		(text "ClkOutHigh" (rect 91 91 147 103)(font "Arial" ))
		(line (pt 168 96)(pt 152 96)(line_width 1))
	)
	(port
		(pt 168 112)
		(output)
		(text "ClkOut4Hz" (rect 0 0 53 12)(font "Arial" ))
		(text "ClkOut4Hz" (rect 94 107 147 119)(font "Arial" ))
		(line (pt 168 112)(pt 152 112)(line_width 1))
	)
	(port
		(pt 168 128)
		(output)
		(text "ClkOutMid" (rect 0 0 50 12)(font "Arial" ))
		(text "ClkOutMid" (rect 97 123 147 135)(font "Arial" ))
		(line (pt 168 128)(pt 152 128)(line_width 1))
	)
	(parameter
		"p2"
		"B\"1111101000\""
		""
	)
	(parameter
		"p3"
		"B\"1001100010010110100000000\""
		""
	)
	(parameter
		"p4"
		"B\"100111000100000\""
		""
	)
	(parameter
		"p5"
		"B\"1001110001000\""
		""
	)
	(parameter
		"p6"
		"B\"10011000100101101000000\""
		""
	)
	(parameter
		"p7"
		"B\"10011100010000\""
		""
	)
	(drawing
		(rectangle (rect 16 16 152 144)(line_width 1))
	)
	(annotation_block (parameter)(rect 184 -64 284 16))
)