sdrm_par.v

这是使用VERILOG语言

    wire \AD[31]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[31]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[23]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[23]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[15]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[15]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[5]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[5]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_cke/OUTBUF_GTS_TRI_2_INV ;
    wire \AD[16]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[16]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[24]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[24]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[6]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[6]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[25]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[25]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[17]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[17]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[7]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[7]/OUTBUF_GTS_AND_1_INV ;
    wire GND;
    wire GSR = glbl.GSR;
    wire VCC;
    wire GTS = glbl.GTS;
    wire NGD2VER_X_1799_0;
    wire NGD2VER_X_1808_0;
    wire NGD2VER_X_1817_0;
    wire NGD2VER_X_1830_0;
    wire NGD2VER_X_1853_0;
    wire NGD2VER_X_1888_0;
    wire NGD2VER_X_1897_0;
    wire NGD2VER_X_1906_0;
    wire NGD2VER_X_1915_0;
    wire NGD2VER_X_1924_0;
    wire NGD2VER_X_1933_0;
    wire NGD2VER_X_1942_0;
    wire NGD2VER_X_1951_0;
    wire NGD2VER_X_1960_0;
    wire NGD2VER_X_2050_0;
    wire NGD2VER_X_2081_0;
    wire NGD2VER_X_2090_0;
    wire NGD2VER_X_2099_0;
    wire NGD2VER_X_2113_0;
    wire NGD2VER_X_2122_0;
    wire NGD2VER_X_2131_0;
    wire NGD2VER_X_2140_0;
    wire NGD2VER_X_2159_0;
    wire NGD2VER_X_2170_0;
    wire NGD2VER_X_2179_0;
    wire NGD2VER_X_2200_0;
    wire NGD2VER_X_2209_0;
    wire NGD2VER_X_2218_0;
    wire NGD2VER_X_2227_0;
    wire NGD2VER_X_2299_0;
    wire NGD2VER_X_2308_0;
    wire NGD2VER_X_2317_0;
    wire NGD2VER_X_2326_0;
    wire NGD2VER_X_2335_0;
    wire [31:0] AD_reg;
    wire [31:0] sd_data_R;
    wire [10:0] sd_add_op;
    wire [31:0] sd_data_reg;
    wire [3:0] sd_doe_n;
    wire [1:0] \sdrm_t/cslt_cntr/count ;
    wire [1:0] \sdrm_t/cslt_cntr/count_N99 ;
    wire [1:0] \sdrm_t/rcd_cntr/count ;
    wire [1:0] \sdrm_t/rcd_cntr/count_N99 ;
    wire [15:0] \sdrm_t/ref_cntr/rcount ;
    wire [15:0] \sdrm_t/ref_cntr/count_N204 ;
    wire [2:0] \sdrm_t/brst_cntr/count ;
    wire [2:0] \sdrm_t/brst_cntr/count_N117 ;
    wire [3:0] \sdrm_t/ki_cntr/count ;
    wire [3:0] \sdrm_t/ki_cntr/count_N123 ;
    wire [15:0] ref_max;
    wire [3:3] \sdrm_t/sd_doe_n215 ;
    wire [3:0] sd_doe_np;
    wire [2:0] burst_max;
    wire [6:5] \sdrm_t/sdrm_st/next_state ;
    wire [3:0] ki_max;
    wire [21:2] Add_reg;
    wire [1:0] rcd_c_max;
    wire [1:0] cas_lat_max;
    wire [2:0] Act_st;
    wire [31:0] \sys_int/Data_reg ;
    initial $sdf_annotate("sdrm_par.sdf");
    X_BUF \AD[18]/INBUF (
      .I (AD[18]),
      .O (\AD[18]/IBUF )
    );
    X_TRI \AD[18]/OUTBUF (
      .I (\AD[18]/OQ ),
      .O (AD[18]),
      .CTL (\AD[18]/OUTBUF_GTS_AND )
    );
    X_KEEPER \AD[18]/KEEPER_0 (
      .O (\AD[18]/KEEPER )
    );
    X_BPAD \AD[18]/PAD (
      .PAD (AD[18])
    );
    X_INV \AD[18]/MUX_SRMUX (
      .I (Locked_i),
      .O (\AD[18]/SRNOT )
    );
    X_AND2 \AD[18]/OUTBUF_GTS_AND_1 (
      .I0 (\AD[18]/OUTBUF_GTS_AND_0_INV ),
      .I1 (\AD[18]/OUTBUF_GTS_AND_1_INV ),
      .O (\AD[18]/OUTBUF_GTS_AND )
    );
    X_FF \AD[18]/IFF/ASYNC_FF (
      .I (\AD[18]/IBUF ),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[18]/IFF/ASYNC_FF_GSR_OR ),
      .O (AD_reg[18])
    );
    X_OR2 \AD[18]/IFF/ASYNC_FF_GSR_OR_2 (
      .I0 (\AD[18]/SRNOT ),
      .I1 (GSR),
      .O (\AD[18]/IFF/ASYNC_FF_GSR_OR )
    );
    X_FF \AD[18]/OFF/ASYNC_FF (
      .I (sd_data_R[18]),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[18]/OFF/ASYNC_FF_GSR_OR ),
      .O (\AD[18]/OQ )
    );
    X_OR2 \AD[18]/OFF/ASYNC_FF_GSR_OR_3 (
      .I0 (\AD[18]/SRNOT ),
      .I1 (GSR),
      .O (\AD[18]/OFF/ASYNC_FF_GSR_OR )
    );
    X_BUF \AD[26]/INBUF (
      .I (AD[26]),
      .O (\AD[26]/IBUF )
    );
    X_TRI \AD[26]/OUTBUF (
      .I (\AD[26]/OQ ),
      .O (AD[26]),
      .CTL (\AD[26]/OUTBUF_GTS_AND )
    );
    X_KEEPER \AD[26]/KEEPER_4 (
      .O (\AD[26]/KEEPER )
    );
    X_BPAD \AD[26]/PAD (
      .PAD (AD[26])
    );
    X_INV \AD[26]/MUX_SRMUX (
      .I (Locked_i),
      .O (\AD[26]/SRNOT )
    );
    X_AND2 \AD[26]/OUTBUF_GTS_AND_5 (
      .I0 (\AD[26]/OUTBUF_GTS_AND_0_INV ),
      .I1 (\AD[26]/OUTBUF_GTS_AND_1_INV ),
      .O (\AD[26]/OUTBUF_GTS_AND )
    );
    X_FF \AD[26]/IFF/ASYNC_FF (
      .I (\AD[26]/IBUF ),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[26]/IFF/ASYNC_FF_GSR_OR ),
      .O (AD_reg[26])
    );
    X_OR2 \AD[26]/IFF/ASYNC_FF_GSR_OR_6 (
      .I0 (\AD[26]/SRNOT ),
      .I1 (GSR),
      .O (\AD[26]/IFF/ASYNC_FF_GSR_OR )
    );
    X_FF \AD[26]/OFF/ASYNC_FF (
      .I (sd_data_R[26]),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[26]/OFF/ASYNC_FF_GSR_OR ),
      .O (\AD[26]/OQ )
    );
    X_OR2 \AD[26]/OFF/ASYNC_FF_GSR_OR_7 (
      .I0 (\AD[26]/SRNOT ),
      .I1 (GSR),
      .O (\AD[26]/OFF/ASYNC_FF_GSR_OR )
    );
    X_BUF \AD[8]/INBUF (
      .I (AD[8]),
      .O (\AD[8]/IBUF )
    );
    X_TRI \AD[8]/OUTBUF (
      .I (\AD[8]/OQ ),
      .O (AD[8]),
      .CTL (\AD[8]/OUTBUF_GTS_AND )
    );
    X_KEEPER \AD[8]/KEEPER_8 (
      .O (\AD[8]/KEEPER )
    );
    X_BPAD \AD[8]/PAD (
      .PAD (AD[8])
    );
    X_INV \AD[8]/MUX_SRMUX (
      .I (Locked_i),
      .O (\AD[8]/SRNOT )
    );
    X_AND2 \AD[8]/OUTBUF_GTS_AND_9 (
      .I0 (\AD[8]/OUTBUF_GTS_AND_0_INV ),
      .I1 (\AD[8]/OUTBUF_GTS_AND_1_INV ),
      .O (\AD[8]/OUTBUF_GTS_AND )
    );
    X_FF \AD[8]/IFF/ASYNC_FF (
      .I (\AD[8]/IBUF ),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[8]/IFF/ASYNC_FF_GSR_OR ),
      .O (AD_reg[8])
    );
    X_OR2 \AD[8]/IFF/ASYNC_FF_GSR_OR_10 (
      .I0 (\AD[8]/SRNOT ),
      .I1 (GSR),
      .O (\AD[8]/IFF/ASYNC_FF_GSR_OR )
    );
    X_FF \AD[8]/OFF/ASYNC_FF (
      .I (sd_data_R[8]),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[8]/OFF/ASYNC_FF_GSR_OR ),
      .O (\AD[8]/OQ )
    );
    X_OR2 \AD[8]/OFF/ASYNC_FF_GSR_OR_11 (
      .I0 (\AD[8]/SRNOT ),
      .I1 (GSR),
      .O (\AD[8]/OFF/ASYNC_FF_GSR_OR )
    );
    X_BUF \AD[27]/INBUF (
      .I (AD[27]),
      .O (\AD[27]/IBUF )
    );
    X_TRI \AD[27]/OUTBUF (
      .I (\AD[27]/OQ ),
      .O (AD[27]),
      .CTL (\AD[27]/OUTBUF_GTS_AND )
    );
    X_KEEPER \AD[27]/KEEPER_12 (
      .O (\AD[27]/KEEPER )
    );
    X_BPAD \AD[27]/PAD (
      .PAD (AD[27])
    );
    X_INV \AD[27]/MUX_SRMUX (
      .I (Locked_i),
      .O (\AD[27]/SRNOT )
    );
    X_AND2 \AD[27]/OUTBUF_GTS_AND_13 (
      .I0 (\AD[27]/OUTBUF_GTS_AND_0_INV ),
      .I1 (\AD[27]/OUTBUF_GTS_AND_1_INV ),
      .O (\AD[27]/OUTBUF_GTS_AND )
    );
    X_FF \AD[27]/IFF/ASYNC_FF (
      .I (\AD[27]/IBUF ),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[27]/IFF/ASYNC_FF_GSR_OR ),
      .O (AD_reg[27])
    );
    X_OR2 \AD[27]/IFF/ASYNC_FF_GSR_OR_14 (
      .I0 (\AD[27]/SRNOT ),
      .I1 (GSR),
      .O (\AD[27]/IFF/ASYNC_FF_GSR_OR )
    );
    X_FF \AD[27]/OFF/ASYNC_FF (
      .I (sd_data_R[27]),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[27]/OFF/ASYNC_FF_GSR_OR ),
      .O (\AD[27]/OQ )
    );
    X_OR2 \AD[27]/OFF/ASYNC_FF_GSR_OR_15 (
      .I0 (\AD[27]/SRNOT ),
      .I1 (GSR),
      .O (\AD[27]/OFF/ASYNC_FF_GSR_OR )
    );
    X_BUF \AD[19]/INBUF (
      .I (AD[19]),
      .O (\AD[19]/IBUF )
    );
    X_TRI \AD[19]/OUTBUF (
      .I (\AD[19]/OQ ),
      .O (AD[19]),
      .CTL (\AD[19]/OUTBUF_GTS_AND )
    );
    X_KEEPER \AD[19]/KEEPER_16 (
      .O (\AD[19]/KEEPER )
    );
    X_BPAD \AD[19]/PAD (
      .PAD (AD[19])
    );
    X_INV \AD[19]/MUX_SRMUX (
      .I (Locked_i),
      .O (\AD[19]/SRNOT )
    );
    X_AND2 \AD[19]/OUTBUF_GTS_AND_17 (
      .I0 (\AD[19]/OUTBUF_GTS_AND_0_INV ),
      .I1 (\AD[19]/OUTBUF_GTS_AND_1_INV ),
      .O (\AD[19]/OUTBUF_GTS_AND )
    );
    X_FF \AD[19]/IFF/ASYNC_FF (
      .I (\AD[19]/IBUF ),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[19]/IFF/ASYNC_FF_GSR_OR ),
      .O (AD_reg[19])
    );
    X_OR2 \AD[19]/IFF/ASYNC_FF_GSR_OR_18 (
      .I0 (\AD[19]/SRNOT ),
      .I1 (GSR),
      .O (\AD[19]/IFF/ASYNC_FF_GSR_OR )
    );
    X_FF \AD[19]/OFF/ASYNC_FF (
      .I (sd_data_R[19]),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[19]/OFF/ASYNC_FF_GSR_OR ),
      .O (\AD[19]/OQ )
    );
    X_OR2 \AD[19]/OFF/ASYNC_FF_GSR_OR_19 (
      .I0 (\AD[19]/SRNOT ),
      .I1 (GSR),
      .O (\AD[19]/OFF/ASYNC_FF_GSR_OR )
    );
    X_BUF \AD[9]/INBUF (
      .I (AD[9]),
      .O (\AD[9]/IBUF )
    );
    X_TRI \AD[9]/OUTBUF (
      .I (\AD[9]/OQ ),
      .O (AD[9]),
      .CTL (\AD[9]/OUTBUF_GTS_AND )
    );
    X_KEEPER \AD[9]/KEEPER_20 (
      .O (\AD[9]/KEEPER )
    );
    X_BPAD \AD[9]/PAD (
      .PAD (AD[9])
    );
    X_INV \AD[9]/MUX_SRMUX (
      .I (Locked_i),
      .O (\AD[9]/SRNOT )
    );
    X_AND2 \AD[9]/OUTBUF_GTS_AND_21 (
      .I0 (\AD[9]/OUTBUF_GTS_AND_0_INV ),
      .I1 (\AD[9]/OUTBUF_GTS_AND_1_INV ),
      .O (\AD[9]/OUTBUF_GTS_AND )
    );
    X_FF \AD[9]/IFF/ASYNC_FF (
      .I (\AD[9]/IBUF ),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[9]/IFF/ASYNC_FF_GSR_OR ),
      .O (AD_reg[9])
    );
    X_OR2 \AD[9]/IFF/ASYNC_FF_GSR_OR_22 (
      .I0 (\AD[9]/SRNOT ),
      .I1 (GSR),
      .O (\AD[9]/IFF/ASYNC_FF_GSR_OR )
    );
    X_FF \AD[9]/OFF/ASYNC_FF (
      .I (sd_data_R[9]),
      .CLK (Clk_i),
      .CE (VCC),
      .SET (GND),
      .RST (\AD[9]/OFF/ASYNC_FF_GSR_OR ),
      .O (\AD[9]/OQ )
    );
    X_OR2 \AD[9]/OFF/ASYNC_FF_GSR_OR_23 (
      .I0 (\AD[9]/SRNOT ),
      .I1 (GSR),
      .O (\AD[9]/OFF/ASYNC_