sdrm_par.v

这是使用VERILOG语言

    wire \sd_data_reg[9]/GSHIFT ;
    wire \sd_data_reg[9]/FROM ;
    wire \Add_reg[10]/CENOT ;
    wire \Add_reg[10]/SRNOT ;
    wire \Add_reg[10]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[12]/CENOT ;
    wire \Add_reg[12]/SRNOT ;
    wire \Add_reg[12]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[12]/FFX/ASYNC_FF_GSR_OR ;
    wire \Add_reg[21]/CENOT ;
    wire \Add_reg[21]/SRNOT ;
    wire \Add_reg[21]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[21]/FFX/ASYNC_FF_GSR_OR ;
    wire \Add_reg[13]/CENOT ;
    wire \Add_reg[13]/SRNOT ;
    wire \Add_reg[13]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[15]/CENOT ;
    wire \Add_reg[15]/SRNOT ;
    wire \Add_reg[15]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[15]/FFX/ASYNC_FF_GSR_OR ;
    wire \Add_reg[16]/CENOT ;
    wire \Add_reg[16]/SRNOT ;
    wire \Add_reg[16]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[18]/CENOT ;
    wire \Add_reg[18]/SRNOT ;
    wire \Add_reg[18]/FFY/ASYNC_FF_GSR_OR ;
    wire \Add_reg[18]/FFX/ASYNC_FF_GSR_OR ;
    wire \Add_reg[19]/CENOT ;
    wire \Add_reg[19]/SRNOT ;
    wire \Add_reg[19]/FFY/ASYNC_FF_GSR_OR ;
    wire \cas_lat_max[1]/SRNOT ;
    wire \cas_lat_max[1]/FFY/ASYNC_FF_GSR_OR ;
    wire \cas_lat_max[1]/FFX/ASYNC_FF_GSR_OR ;
    wire \rcd_c_max[1]/SRNOT ;
    wire \rcd_c_max[1]/FFY/ASYNC_FF_GSR_OR ;
    wire \rcd_c_max[1]/FFX/ASYNC_FF_GSR_OR ;
    wire \burst_max[1]/SRNOT ;
    wire \burst_max[1]/FFY/ASYNC_FF_GSR_OR ;
    wire \burst_max[1]/FFX/ASYNC_FF_GSR_OR ;
    wire \burst_max[2]/SRNOT ;
    wire \burst_max[2]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[0]/SRNOT ;
    wire \ref_max[0]/FFY/ASYNC_FF_GSR_OR ;
    wire \sd_data_reg[2]/LOGIC_ZERO ;
    wire \sd_data_reg[2]/LOGIC_ONE ;
    wire \sd_data_reg[2]/CYMUXF ;
    wire \sd_data_reg[2]/GSHIFT ;
    wire \sd_data_reg[2]/FROM ;
    wire \ref_max[2]/SRNOT ;
    wire \ref_max[2]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[2]/FFX/ASYNC_FF_GSR_OR ;
    wire \sd_doe_n[1]/SRNOT ;
    wire \sd_doe_n[1]/FFY/ASYNC_FF_GSR_OR ;
    wire \sd_doe_n[1]/FFX/ASYNC_FF_GSR_OR ;
    wire \sd_doe_n[2]/SRNOT ;
    wire \sd_doe_n[2]/FFY/ASYNC_FF_GSR_OR ;
    wire \sd_doe_n[3]/SRNOT ;
    wire \sd_doe_n[3]/FFY/ASYNC_FF_GSR_OR ;
    wire \sd_data_reg[15]/LOGIC_ZERO ;
    wire \sd_data_reg[15]/LOGIC_ONE ;
    wire \sd_data_reg[15]/CYMUXF ;
    wire \sd_data_reg[15]/GSHIFT ;
    wire \sd_data_reg[15]/FROM ;
    wire \sd_data_reg[31]/LOGIC_ZERO ;
    wire \sd_data_reg[31]/LOGIC_ONE ;
    wire \sd_data_reg[31]/CYMUXF ;
    wire \sd_data_reg[31]/GSHIFT ;
    wire \sd_data_reg[31]/FROM ;
    wire \sd_data_reg[23]/LOGIC_ZERO ;
    wire \sd_data_reg[23]/LOGIC_ONE ;
    wire \sd_data_reg[23]/CYMUXF ;
    wire \sd_data_reg[23]/GSHIFT ;
    wire \sd_data_reg[23]/FROM ;
    wire \auto_ref_in/BYNOT ;
    wire \auto_ref_in/SRNOT ;
    wire \auto_ref_in/FFY/ASYNC_FF_GSR_OR ;
    wire \sd_data_reg[3]/LOGIC_ZERO ;
    wire \sd_data_reg[3]/LOGIC_ONE ;
    wire \sd_data_reg[3]/CYMUXF ;
    wire \sd_data_reg[3]/GSHIFT ;
    wire \sd_data_reg[3]/FROM ;
    wire \sd_data_reg[16]/LOGIC_ZERO ;
    wire \sd_data_reg[16]/LOGIC_ONE ;
    wire \sd_data_reg[16]/CYMUXF ;
    wire \sd_data_reg[16]/GSHIFT ;
    wire \sd_data_reg[16]/FROM ;
    wire \sd_data_reg[24]/LOGIC_ZERO ;
    wire \sd_data_reg[24]/LOGIC_ONE ;
    wire \sd_data_reg[24]/CYMUXF ;
    wire \sd_data_reg[24]/GSHIFT ;
    wire \sd_data_reg[24]/FROM ;
    wire \AD_tri/LOGIC_ZERO ;
    wire \AD_tri/LOGIC_ONE ;
    wire \AD_tri/CYMUXF ;
    wire \AD_tri/GSHIFT ;
    wire \AD_tri/FROM ;
    wire \sdrm_t/n489/GROM ;
    wire \sdrm_t/n490/GROM ;
    wire \sdrm_t/n491/GROM ;
    wire \sdrm_t/n492/GROM ;
    wire \sdrm_t/pre_locked/GROM ;
    wire \sd_data_reg[4]/LOGIC_ZERO ;
    wire \sd_data_reg[4]/LOGIC_ONE ;
    wire \sd_data_reg[4]/CYMUXF ;
    wire \sd_data_reg[4]/GSHIFT ;
    wire \sd_data_reg[4]/FROM ;
    wire \sdrm_t/n438/GROM ;
    wire \sd_data_reg[25]/LOGIC_ZERO ;
    wire \sd_data_reg[25]/LOGIC_ONE ;
    wire \sd_data_reg[25]/CYMUXF ;
    wire \sd_data_reg[25]/GSHIFT ;
    wire \sd_data_reg[25]/FROM ;
    wire \sd_data_reg[17]/LOGIC_ZERO ;
    wire \sd_data_reg[17]/LOGIC_ONE ;
    wire \sd_data_reg[17]/CYMUXF ;
    wire \sd_data_reg[17]/GSHIFT ;
    wire \sd_data_reg[17]/FROM ;
    wire \sdrm_t/sdrm_st/state[6]/SRNOT ;
    wire \sdrm_t/sdrm_st/state[6]/GROM ;
    wire \sdrm_t/sdrm_st/state[6]/FFY/ASYNC_FF_GSR_OR ;
    wire \sdrm_t/sdrm_st/state[6]/FFX/ASYNC_FF_GSR_OR ;
    wire \Act_st[2]/LOGIC_ONE ;
    wire \sd_data_reg[10]/LOGIC_ZERO ;
    wire \sd_data_reg[10]/LOGIC_ONE ;
    wire \sd_data_reg[10]/CYMUXF ;
    wire \sd_data_reg[10]/GSHIFT ;
    wire \sd_data_reg[10]/FROM ;
    wire \sd_data_reg[5]/LOGIC_ZERO ;
    wire \sd_data_reg[5]/LOGIC_ONE ;
    wire \sd_data_reg[5]/CYMUXF ;
    wire \sd_data_reg[5]/GSHIFT ;
    wire \sd_data_reg[5]/FROM ;
    wire \sd_data_reg[26]/LOGIC_ZERO ;
    wire \sd_data_reg[26]/LOGIC_ONE ;
    wire \sd_data_reg[26]/CYMUXF ;
    wire \sd_data_reg[26]/GSHIFT ;
    wire \sd_data_reg[26]/FROM ;
    wire \sd_data_reg[18]/LOGIC_ZERO ;
    wire \sd_data_reg[18]/LOGIC_ONE ;
    wire \sd_data_reg[18]/CYMUXF ;
    wire \sd_data_reg[18]/GSHIFT ;
    wire \sd_data_reg[18]/FROM ;
    wire \ref_max[3]/SRNOT ;
    wire \ref_max[3]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[12]/SRNOT ;
    wire \ref_max[12]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[5]/SRNOT ;
    wire \ref_max[5]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[5]/FFX/ASYNC_FF_GSR_OR ;
    wire \ref_max[14]/SRNOT ;
    wire \ref_max[14]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[14]/FFX/ASYNC_FF_GSR_OR ;
    wire \ref_max[6]/SRNOT ;
    wire \ref_max[6]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[8]/SRNOT ;
    wire \ref_max[8]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[8]/FFX/ASYNC_FF_GSR_OR ;
    wire \ref_max[15]/SRNOT ;
    wire \ref_max[15]/FFY/ASYNC_FF_GSR_OR ;
    wire \ki_max[0]/SRNOT ;
    wire \ki_max[0]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[9]/SRNOT ;
    wire \ref_max[9]/FFY/ASYNC_FF_GSR_OR ;
    wire \ki_max[2]/SRNOT ;
    wire \ki_max[2]/FFY/ASYNC_FF_GSR_OR ;
    wire \ki_max[2]/FFX/ASYNC_FF_GSR_OR ;
    wire \ref_max[11]/SRNOT ;
    wire \ref_max[11]/FFY/ASYNC_FF_GSR_OR ;
    wire \ref_max[11]/FFX/ASYNC_FF_GSR_OR ;
    wire \ki_max[3]/SRNOT ;
    wire \ki_max[3]/FFY/ASYNC_FF_GSR_OR ;
    wire \sdrm_t/n498/LOGIC_ZERO ;
    wire \sdrm_t/n498/LOGIC_ONE ;
    wire \sdrm_t/n498/CYMUXF ;
    wire \sdrm_t/n498/GSHIFT ;
    wire \sdrm_t/n498/FROM ;
    wire \sd_data_reg[11]/LOGIC_ZERO ;
    wire \sd_data_reg[11]/LOGIC_ONE ;
    wire \sd_data_reg[11]/CYMUXF ;
    wire \sd_data_reg[11]/GSHIFT ;
    wire \sd_data_reg[11]/FROM ;
    wire \sd_data_reg[6]/LOGIC_ZERO ;
    wire \sd_data_reg[6]/LOGIC_ONE ;
    wire \sd_data_reg[6]/CYMUXF ;
    wire \sd_data_reg[6]/GSHIFT ;
    wire \sd_data_reg[6]/FROM ;
    wire \sd_data_reg[27]/LOGIC_ZERO ;
    wire \sd_data_reg[27]/LOGIC_ONE ;
    wire \sd_data_reg[27]/CYMUXF ;
    wire \sd_data_reg[27]/GSHIFT ;
    wire \sd_data_reg[27]/FROM ;
    wire \sd_data_reg[19]/LOGIC_ZERO ;
    wire \sd_data_reg[19]/LOGIC_ONE ;
    wire \sd_data_reg[19]/CYMUXF ;
    wire \sd_data_reg[19]/GSHIFT ;
    wire \sd_data_reg[19]/FROM ;
    wire \sys_int/Data_reg[11]/SRNOT ;
    wire \sys_int/Data_reg[11]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[13]/SRNOT ;
    wire \sys_int/Data_reg[13]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[13]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[20]/SRNOT ;
    wire \sys_int/Data_reg[20]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[22]/SRNOT ;
    wire \sys_int/Data_reg[22]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[22]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[14]/SRNOT ;
    wire \sys_int/Data_reg[14]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[31]/SRNOT ;
    wire \sys_int/Data_reg[31]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[31]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[16]/SRNOT ;
    wire \sys_int/Data_reg[16]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[16]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[23]/SRNOT ;
    wire \sys_int/Data_reg[23]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[25]/SRNOT ;
    wire \sys_int/Data_reg[25]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[25]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[17]/SRNOT ;
    wire \sys_int/Data_reg[17]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[19]/SRNOT ;
    wire \sys_int/Data_reg[19]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[19]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[26]/SRNOT ;
    wire \sys_int/Data_reg[26]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[28]/SRNOT ;
    wire \sys_int/Data_reg[28]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[28]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[1]/SRNOT ;
    wire \sys_int/Data_reg[1]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[1]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[29]/SRNOT ;
    wire \sys_int/Data_reg[29]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[2]/SRNOT ;
    wire \sys_int/Data_reg[2]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[4]/SRNOT ;
    wire \sys_int/Data_reg[4]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[4]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[5]/SRNOT ;
    wire \sys_int/Data_reg[5]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[7]/SRNOT ;
    wire \sys_int/Data_reg[7]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[7]/FFX/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[8]/SRNOT ;
    wire \sys_int/Data_reg[8]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[10]/SRNOT ;
    wire \sys_int/Data_reg[10]/FFY/ASYNC_FF_GSR_OR ;
    wire \sys_int/Data_reg[10]/FFX/ASYNC_FF_GSR_OR ;
    wire \dll0/CLK0 ;
    wire \dll0/CLK180 ;
    wire \dll0/CLK270 ;
    wire \dll0/CLK90 ;
    wire \dll0/CLKDV ;
    wire \dll1/CLK180 ;
    wire \dll1/CLK270 ;
    wire \dll1/CLK90 ;
    wire \dll1/CLKDV ;
    wire \AD[18]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[18]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[26]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[26]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[8]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[8]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[27]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[27]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[19]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[19]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[9]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[9]/OUTBUF_GTS_AND_1_INV ;
    wire \Clk_SDp/OUTBUF_GTS_TRI_2_INV ;
    wire \AD[28]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[28]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_dqm[0]/OUTBUF_GTS_TRI_2_INV ;
    wire \AD[29]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[29]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_we/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_dqm[1]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[0]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_dqm[2]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[1]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_dqm[3]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[2]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[3]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[4]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[5]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[10]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[10]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_add[6]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[11]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[11]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_cs1/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[7]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[20]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[20]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[12]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[12]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_cs2/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[8]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[13]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[13]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[21]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[21]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_ba/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_add[9]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[30]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[30]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[22]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[22]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[14]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[14]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[15]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[15]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[23]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[23]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[31]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[31]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[24]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[24]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[16]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[16]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_add[10]/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[17]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[17]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[25]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[25]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[0]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[0]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[18]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[18]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[26]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[26]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[1]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[1]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[27]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[27]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[19]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[19]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[2]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[2]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[28]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[28]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[3]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[3]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[29]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[29]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[4]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[4]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[5]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[5]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[6]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[6]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[7]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[7]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[10]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[10]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[0]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[0]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_ras/OUTBUF_GTS_TRI_2_INV ;
    wire \sd_data[8]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[8]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[11]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[11]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[1]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[1]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_data[9]/OUTBUF_GTS_AND_0_INV ;
    wire \sd_data[9]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[12]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[12]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[20]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[20]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[2]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[2]/OUTBUF_GTS_AND_1_INV ;
    wire \sd_cas/OUTBUF_GTS_TRI_2_INV ;
    wire \AD[21]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[21]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[13]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[13]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[3]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[3]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[14]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[14]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[22]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[22]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[30]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[30]/OUTBUF_GTS_AND_1_INV ;
    wire \AD[4]/OUTBUF_GTS_AND_0_INV ;
    wire \AD[4]/OUTBUF_GTS_AND_1_INV ;