sdrm_par.sdf

这是使用VERILOG语言

// The TEMPERATURE and VOLTAGE fields in the SDF file produced by Xilinx are currently
// not implemented.  These fields are place holders.  These fields will be implemented
// in a future release.
(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "Synopsys_edif")
  (DATE "Tue Jun 29 10:40:22 1999 ")
  (VENDOR "Xilinx")
  (PROGRAM "Xilinx VERILOG SDF writer")
  (VERSION "C.16")
  (DIVIDER /)
  (VOLTAGE 4.75:4.75:4.75)
  (PROCESS "best=1.0:nom=1.0:worst=1.0")
  (TEMPERATURE 85:85:85)
  (TIMESCALE 1 ps)
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE AD\[18\]\/INBUF)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
          )
        )
  )
  (CELL
    (CELLTYPE "X_TRI")
      (INSTANCE AD\[18\]\/OUTBUF)
        (DELAY
          (ABSOLUTE
            (PORT I (1562:1562:1562) (1562:1562:1562))
            (PORT CTL (1131:1131:1131) (1131:1131:1131))
            (IOPATH I O (1079:1079:1079) (1079:1079:1079))
            (IOPATH CTL O (1079:1079:1079) (1079:1079:1079) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_INV")
      (INSTANCE AD\[18\]\/MUX_SRMUX)
        (DELAY
          (ABSOLUTE
            (PORT I (3505:3505:3505) (3505:3505:3505))
            (IOPATH I O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE AD\[18\]\/OUTBUF_GTS_AND_1)
        (DELAY
          (ABSOLUTE
            (PORT I0 (8835:8835:8835) (8835:8835:8835))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[18\]\/IFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (485:485:485) (485:485:485))
            (PORT CLK (404:404:404) (404:404:404))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[18\]\/IFF\/ASYNC_FF_GSR_OR_2)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[18\]\/OFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (3639:3639:3639) (3639:3639:3639))
            (PORT CLK (404:404:404) (404:404:404))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[18\]\/OFF\/ASYNC_FF_GSR_OR_3)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE AD\[26\]\/INBUF)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
          )
        )
  )
  (CELL
    (CELLTYPE "X_TRI")
      (INSTANCE AD\[26\]\/OUTBUF)
        (DELAY
          (ABSOLUTE
            (PORT I (1562:1562:1562) (1562:1562:1562))
            (PORT CTL (1131:1131:1131) (1131:1131:1131))
            (IOPATH I O (1079:1079:1079) (1079:1079:1079))
            (IOPATH CTL O (1079:1079:1079) (1079:1079:1079) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_INV")
      (INSTANCE AD\[26\]\/MUX_SRMUX)
        (DELAY
          (ABSOLUTE
            (PORT I (3328:3328:3328) (3328:3328:3328))
            (IOPATH I O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE AD\[26\]\/OUTBUF_GTS_AND_5)
        (DELAY
          (ABSOLUTE
            (PORT I0 (6322:6322:6322) (6322:6322:6322))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[26\]\/IFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (485:485:485) (485:485:485))
            (PORT CLK (404:404:404) (404:404:404))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[26\]\/IFF\/ASYNC_FF_GSR_OR_6)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[26\]\/OFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (3668:3668:3668) (3668:3668:3668))
            (PORT CLK (404:404:404) (404:404:404))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[26\]\/OFF\/ASYNC_FF_GSR_OR_7)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE AD\[8\]\/INBUF)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
          )
        )
  )
  (CELL
    (CELLTYPE "X_TRI")
      (INSTANCE AD\[8\]\/OUTBUF)
        (DELAY
          (ABSOLUTE
            (PORT I (1562:1562:1562) (1562:1562:1562))
            (PORT CTL (1131:1131:1131) (1131:1131:1131))
            (IOPATH I O (1079:1079:1079) (1079:1079:1079))
            (IOPATH CTL O (1079:1079:1079) (1079:1079:1079) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_INV")
      (INSTANCE AD\[8\]\/MUX_SRMUX)
        (DELAY
          (ABSOLUTE
            (PORT I (3473:3473:3473) (3473:3473:3473))
            (IOPATH I O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE AD\[8\]\/OUTBUF_GTS_AND_9)
        (DELAY
          (ABSOLUTE
            (PORT I0 (6357:6357:6357) (6357:6357:6357))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[8\]\/IFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (485:485:485) (485:485:485))
            (PORT CLK (448:448:448) (448:448:448))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[8\]\/IFF\/ASYNC_FF_GSR_OR_10)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[8\]\/OFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (3860:3860:3860) (3860:3860:3860))
            (PORT CLK (448:448:448) (448:448:448))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[8\]\/OFF\/ASYNC_FF_GSR_OR_11)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_BUF")
      (INSTANCE AD\[27\]\/INBUF)
        (DELAY
          (ABSOLUTE
            (IOPATH I O (642:642:642) (642:642:642))
          )
        )
  )
  (CELL
    (CELLTYPE "X_TRI")
      (INSTANCE AD\[27\]\/OUTBUF)
        (DELAY
          (ABSOLUTE
            (PORT I (1562:1562:1562) (1562:1562:1562))
            (PORT CTL (1131:1131:1131) (1131:1131:1131))
            (IOPATH I O (1079:1079:1079) (1079:1079:1079))
            (IOPATH CTL O (1079:1079:1079) (1079:1079:1079) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_INV")
      (INSTANCE AD\[27\]\/MUX_SRMUX)
        (DELAY
          (ABSOLUTE
            (PORT I (3293:3293:3293) (3293:3293:3293))
            (IOPATH I O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_AND2")
      (INSTANCE AD\[27\]\/OUTBUF_GTS_AND_13)
        (DELAY
          (ABSOLUTE
            (PORT I0 (7171:7171:7171) (7171:7171:7171))
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[27\]\/IFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (485:485:485) (485:485:485))
            (PORT CLK (448:448:448) (448:448:448))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[27\]\/IFF\/ASYNC_FF_GSR_OR_14)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))
          )
        )
  )
  (CELL
    (CELLTYPE "X_FF")
      (INSTANCE AD\[27\]\/OFF\/ASYNC_FF)
        (DELAY
          (ABSOLUTE
            (PORT I (4350:4350:4350) (4350:4350:4350))
            (PORT CLK (448:448:448) (448:448:448))
            (IOPATH CLK O (604:604:604) (604:604:604))
            (IOPATH SET O (0:0:0) (0:0:0))
            (IOPATH RST O (819:819:819) (819:819:819))
          )
        )
        (TIMINGCHECK
          (SETUP (posedge I) (posedge CLK) (397:397:397))
          (SETUP (negedge I) (posedge CLK) (397:397:397))
          (HOLD (posedge I) (posedge CLK) (0:0:0))
          (HOLD (negedge I) (posedge CLK) (0:0:0))
          (WIDTH (posedge CLK) (1500:1500:1500))
          (WIDTH (negedge CLK) (1500:1500:1500))
          (SETUP (negedge RST) (posedge CLK) (432:432:432))
          (WIDTH (posedge RST) (2500:2500:2500))
        )
  )
  (CELL
    (CELLTYPE "X_OR2")
      (INSTANCE AD\[27\]\/OFF\/ASYNC_FF_GSR_OR_15)
        (DELAY
          (ABSOLUTE
            (IOPATH I0 O (0:0:0) (0:0:0))
            (IOPATH I1 O (0:0:0) (0:0:0))