sdrm.edf

这是使用VERILOG语言

     )
     (net (rename HALF_SUM_2_ "HALF_SUM[2]")
      (joined (portRef S (instanceRef A_CY_2))
       (portRef LI (instanceRef A_XOR_2)) (portRef LO (instanceRef A_LUT_2))
      )
     )
     (net (rename HALF_SUM_0_ "HALF_SUM[0]")
      (joined (portRef S (instanceRef A_CYI))
       (portRef LI (instanceRef A_XORI)) (portRef LO (instanceRef A_LUTI))
      )
     )
     (net (rename CARRY_2_ "CARRY[2]")
      (joined (portRef CI (instanceRef A_CY_3))
       (portRef CI (instanceRef A_XOR_3)) (portRef LO (instanceRef A_CY_2))
      )
     )
     (net (rename CARRY_0_ "CARRY[0]")
      (joined (portRef CI (instanceRef A_CY_1))
       (portRef CI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_CYI))
      )
     )
     (net (rename S_3_ "S[3]")
      (joined (portRef (member S_3_0_ 0)) (portRef O (instanceRef A_XOR_3)))
     )
    )
   )
  )
  (cell sdrm_t (cellType GENERIC)
   (view Netlist_representation (viewType NETLIST)
    (interface (port sd_ras_o (direction OUTPUT))
     (port sd_cas_o (direction OUTPUT)) (port sd_we_o (direction OUTPUT))
     (port sd_ba_o (direction OUTPUT)) (port ready_o (direction OUTPUT))
     (port Locked_j (direction OUTPUT)) (port Locked_i (direction OUTPUT))
     (port kid (direction OUTPUT)) (port auto_ref_out (direction OUTPUT))
     (port rcd_end (direction OUTPUT)) (port AD_tri (direction OUTPUT))
     (port write_st (direction INPUT)) (port auto_ref_in (direction INPUT))
     (port Locked1 (direction INPUT)) (port Locked2 (direction INPUT))
     (port Clk_i (direction INPUT)) (port Clk_j (direction INPUT))
     (port (array (rename sd_add_o_10_0_ "sd_add_o[10:0]") 11)
      (direction OUTPUT)
     )
     (port (array (rename sd_doe_n_3_0_ "sd_doe_n[3:0]") 4) (direction OUTPUT)
     )
     (port (array (rename Act_st_2_0_ "Act_st[2:0]") 3) (direction INPUT))
     (port (array (rename rcd_c_max_1_0_ "rcd_c_max[1:0]") 2)
      (direction INPUT)
     )
     (port (array (rename cas_lat_max_1_0_ "cas_lat_max[1:0]") 2)
      (direction INPUT)
     )
     (port (array (rename burst_max_2_0_ "burst_max[2:0]") 3)
      (direction INPUT)
     )
     (port (array (rename ki_max_3_0_ "ki_max[3:0]") 4) (direction INPUT))
     (port (array (rename ref_max_15_0_ "ref_max[15:0]") 16) (direction INPUT)
     )
     (port (array (rename Add_reg_21_2_ "Add_reg[21:2]") 20) (direction INPUT)
     )
    )
    (contents (instance Logic0 (viewRef Netlist_representation (cellRef GND)))
     (instance I_AD_tri
      (viewRef Netlist_representation
       (cellRef SRL16 (libraryRef xfpga_virtex_6))
      )
     )
     (instance Logic1 (viewRef Netlist_representation (cellRef VCC)))
     (instance SRL16
      (viewRef Netlist_representation
       (cellRef SRL16 (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_3_ "sdrm_st/state_reg[3]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_7_ "sdrm_st/state_reg[7]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_5_ "sdrm_st/state_reg[5]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_1_ "sdrm_st/state_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_8_ "sdrm_st/state_reg[8]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_11_ "sdrm_st/state_reg[11]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_13_ "sdrm_st/state_reg[13]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_12_ "sdrm_st/state_reg[12]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_10_ "sdrm_st/state_reg[10]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_9_ "sdrm_st/state_reg[9]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_4_ "sdrm_st/state_reg[4]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_6_ "sdrm_st/state_reg[6]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sdrm_st_state_reg_2_ "sdrm_st/state_reg[2]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_15_ "ref_cntr/rcount_reg[15]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_14_ "ref_cntr/rcount_reg[14]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_13_ "ref_cntr/rcount_reg[13]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_12_ "ref_cntr/rcount_reg[12]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_11_ "ref_cntr/rcount_reg[11]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_10_ "ref_cntr/rcount_reg[10]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_9_ "ref_cntr/rcount_reg[9]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_8_ "ref_cntr/rcount_reg[8]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_7_ "ref_cntr/rcount_reg[7]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_6_ "ref_cntr/rcount_reg[6]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_5_ "ref_cntr/rcount_reg[5]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_4_ "ref_cntr/rcount_reg[4]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_3_ "ref_cntr/rcount_reg[3]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_2_ "ref_cntr/rcount_reg[2]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_1_ "ref_cntr/rcount_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_rcount_reg_0_ "ref_cntr/rcount_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDCP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ki_cntr_count_reg_3_ "ki_cntr/count_reg[3]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ki_cntr_count_reg_2_ "ki_cntr/count_reg[2]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ki_cntr_count_reg_1_ "ki_cntr/count_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ki_cntr_count_reg_0_ "ki_cntr/count_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_auto_ref_reg "ref_cntr/auto_ref_reg")
      (viewRef Netlist_representation
       (cellRef FDCE (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename rcd_cntr_count_reg_1_ "rcd_cntr/count_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename rcd_cntr_count_reg_0_ "rcd_cntr/count_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename brst_cntr_count_reg_2_ "brst_cntr/count_reg[2]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename brst_cntr_count_reg_1_ "brst_cntr/count_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename brst_cntr_count_reg_0_ "brst_cntr/count_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename cslt_cntr_count_reg_1_ "cslt_cntr/count_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename cslt_cntr_count_reg_0_ "cslt_cntr/count_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_doe_n_reg_3_ "sd_doe_n_reg[3]")
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_doe_n_reg_2_ "sd_doe_n_reg[2]")
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_doe_n_reg_1_ "sd_doe_n_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_doe_n_reg_0_ "sd_doe_n_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_10_ "sd_add_o_reg[10]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_9_ "sd_add_o_reg[9]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_8_ "sd_add_o_reg[8]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_7_ "sd_add_o_reg[7]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_6_ "sd_add_o_reg[6]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_5_ "sd_add_o_reg[5]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_4_ "sd_add_o_reg[4]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_3_ "sd_add_o_reg[3]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_2_ "sd_add_o_reg[2]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_1_ "sd_add_o_reg[1]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename sd_add_o_reg_0_ "sd_add_o_reg[0]")
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance Locked_i_reg
      (viewRef Netlist_representation (cellRef FD (libraryRef xfpga_virtex_6))
      )
     )
     (instance ld_rcd_reg
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance sd_cas_o_reg
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance sd_ras_o_reg
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance ld_cslt_reg
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance ld_brst_reg
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance sd_add_mx_reg
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance sd_we_o_reg
      (viewRef Netlist_representation
       (cellRef FDP (libraryRef xfpga_virtex_6))
      )
     )
     (instance clr_ref_d_reg
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance sd_ba_o_reg
      (viewRef Netlist_representation
       (cellRef FDC (libraryRef xfpga_virtex_6))
      )
     )
     (instance (rename ref_cntr_sub_59 "ref_cntr/sub_59")
      (viewRef Netlist_representation (cellRef sdrm_t_xdw_incdec_16_0))
     )
     (instance (rename rcd_cntr_sub_54 "rcd_cntr/sub_54")
      (viewRef Netlist_representation (cellRef sdrm_t_xdw_incdec_2_1))
     )
     (instance (rename cslt_cntr_sub_53 "cslt_cntr/sub_53")