sdrm.edf

这是使用VERILOG语言

       (portRef DI (instanceRef A_CYI))
      )
     )
     (net (rename HALF_SUM_1_ "HALF_SUM[1]")
      (joined (portRef S (instanceRef A_CY_1))
       (portRef LI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_LUT_1))
      )
     )
     (net (rename S_0_ "S[0]")
      (joined (portRef (member S_1_0_ 1)) (portRef O (instanceRef A_XORI)))
     )
     (net INC_DEC
      (joined (portRef INC_DEC) (portRef I1 (instanceRef A_LUT_1)))
     )
     (net logic_1
      (joined (portRef I1 (instanceRef A_LUTI))
       (portRef P (instanceRef A_VCC))
      )
     )
     (net (rename S_1_ "S[1]")
      (joined (portRef (member S_1_0_ 0)) (portRef O (instanceRef A_XOR_1)))
     )
     (net (rename A_1_ "A[1]")
      (joined (portRef (member A_1_0_ 0)) (portRef I0 (instanceRef A_LUT_1))
       (portRef DI (instanceRef A_CY_1))
      )
     )
     (net (rename HALF_SUM_0_ "HALF_SUM[0]")
      (joined (portRef S (instanceRef A_CYI))
       (portRef LI (instanceRef A_XORI)) (portRef LO (instanceRef A_LUTI))
      )
     )
     (net (rename CARRY_0_ "CARRY[0]")
      (joined (portRef CI (instanceRef A_CY_1))
       (portRef CI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_CYI))
      )
     )
    )
   )
  )
  (cell sdrm_t_xdw_incdec_2_0 (cellType GENERIC)
   (view Netlist_representation (viewType NETLIST)
    (interface (port INC_DEC (direction INPUT))
     (port (array (rename A_1_0_ "A[1:0]") 2) (direction INPUT))
     (port (array (rename S_1_0_ "S[1:0]") 2) (direction OUTPUT))
    )
    (contents
     (instance A_GND
      (viewRef Netlist_representation
       (cellRef GND_ (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUTI
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CYI
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XOR_1
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_VCC
      (viewRef Netlist_representation
       (cellRef VCC_ (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XORI
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUT_1
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CY_1
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (net logic_0
      (joined (portRef CI (instanceRef A_CYI))
       (portRef CI (instanceRef A_XORI)) (portRef G (instanceRef A_GND))
      )
     )
     (net (rename A_0_ "A[0]")
      (joined (portRef (member A_1_0_ 1)) (portRef I0 (instanceRef A_LUTI))
       (portRef DI (instanceRef A_CYI))
      )
     )
     (net (rename HALF_SUM_1_ "HALF_SUM[1]")
      (joined (portRef S (instanceRef A_CY_1))
       (portRef LI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_LUT_1))
      )
     )
     (net (rename S_0_ "S[0]")
      (joined (portRef (member S_1_0_ 1)) (portRef O (instanceRef A_XORI)))
     )
     (net INC_DEC
      (joined (portRef INC_DEC) (portRef I1 (instanceRef A_LUT_1)))
     )
     (net logic_1
      (joined (portRef I1 (instanceRef A_LUTI))
       (portRef P (instanceRef A_VCC))
      )
     )
     (net (rename S_1_ "S[1]")
      (joined (portRef (member S_1_0_ 0)) (portRef O (instanceRef A_XOR_1)))
     )
     (net (rename A_1_ "A[1]")
      (joined (portRef (member A_1_0_ 0)) (portRef I0 (instanceRef A_LUT_1))
       (portRef DI (instanceRef A_CY_1))
      )
     )
     (net (rename HALF_SUM_0_ "HALF_SUM[0]")
      (joined (portRef S (instanceRef A_CYI))
       (portRef LI (instanceRef A_XORI)) (portRef LO (instanceRef A_LUTI))
      )
     )
     (net (rename CARRY_0_ "CARRY[0]")
      (joined (portRef CI (instanceRef A_CY_1))
       (portRef CI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_CYI))
      )
     )
    )
   )
  )
  (cell sdrm_t_xdw_incdec_3_0 (cellType GENERIC)
   (view Netlist_representation (viewType NETLIST)
    (interface (port INC_DEC (direction INPUT))
     (port (array (rename A_2_0_ "A[2:0]") 3) (direction INPUT))
     (port (array (rename S_2_0_ "S[2:0]") 3) (direction OUTPUT))
    )
    (contents
     (instance A_GND
      (viewRef Netlist_representation
       (cellRef GND_ (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUTI
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CYI
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XOR_1
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUT_2
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CY_2
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_VCC
      (viewRef Netlist_representation
       (cellRef VCC_ (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XORI
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XOR_2
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUT_1
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CY_1
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (net logic_0
      (joined (portRef CI (instanceRef A_CYI))
       (portRef CI (instanceRef A_XORI)) (portRef G (instanceRef A_GND))
      )
     )
     (net (rename A_0_ "A[0]")
      (joined (portRef (member A_2_0_ 2)) (portRef I0 (instanceRef A_LUTI))
       (portRef DI (instanceRef A_CYI))
      )
     )
     (net (rename S_2_ "S[2]")
      (joined (portRef (member S_2_0_ 0)) (portRef O (instanceRef A_XOR_2)))
     )
     (net (rename CARRY_1_ "CARRY[1]")
      (joined (portRef CI (instanceRef A_CY_2))
       (portRef CI (instanceRef A_XOR_2)) (portRef LO (instanceRef A_CY_1))
      )
     )
     (net (rename A_2_ "A[2]")
      (joined (portRef (member A_2_0_ 0)) (portRef I0 (instanceRef A_LUT_2))
       (portRef DI (instanceRef A_CY_2))
      )
     )
     (net (rename HALF_SUM_1_ "HALF_SUM[1]")
      (joined (portRef S (instanceRef A_CY_1))
       (portRef LI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_LUT_1))
      )
     )
     (net (rename S_0_ "S[0]")
      (joined (portRef (member S_2_0_ 2)) (portRef O (instanceRef A_XORI)))
     )
     (net INC_DEC
      (joined (portRef INC_DEC) (portRef I1 (instanceRef A_LUT_1))
       (portRef I1 (instanceRef A_LUT_2))
      )
     )
     (net logic_1
      (joined (portRef I1 (instanceRef A_LUTI))
       (portRef P (instanceRef A_VCC))
      )
     )
     (net (rename S_1_ "S[1]")
      (joined (portRef (member S_2_0_ 1)) (portRef O (instanceRef A_XOR_1)))
     )
     (net (rename A_1_ "A[1]")
      (joined (portRef (member A_2_0_ 1)) (portRef I0 (instanceRef A_LUT_1))
       (portRef DI (instanceRef A_CY_1))
      )
     )
     (net (rename HALF_SUM_2_ "HALF_SUM[2]")
      (joined (portRef S (instanceRef A_CY_2))
       (portRef LI (instanceRef A_XOR_2)) (portRef LO (instanceRef A_LUT_2))
      )
     )
     (net (rename HALF_SUM_0_ "HALF_SUM[0]")
      (joined (portRef S (instanceRef A_CYI))
       (portRef LI (instanceRef A_XORI)) (portRef LO (instanceRef A_LUTI))
      )
     )
     (net (rename CARRY_0_ "CARRY[0]")
      (joined (portRef CI (instanceRef A_CY_1))
       (portRef CI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_CYI))
      )
     )
    )
   )
  )
  (cell sdrm_t_xdw_incdec_4_0 (cellType GENERIC)
   (view Netlist_representation (viewType NETLIST)
    (interface (port INC_DEC (direction INPUT))
     (port (array (rename A_3_0_ "A[3:0]") 4) (direction INPUT))
     (port (array (rename S_3_0_ "S[3:0]") 4) (direction OUTPUT))
    )
    (contents
     (instance A_GND
      (viewRef Netlist_representation
       (cellRef GND_ (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUTI
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CYI
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XOR_1
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUT_2
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CY_2
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUT_3
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CY_3
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_VCC
      (viewRef Netlist_representation
       (cellRef VCC_ (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XORI
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XOR_2
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_LUT_1
      (viewRef Netlist_representation
       (cellRef DWLUT2_L (libraryRef xfpga_virtex_6))
      )
      (property INIT (string "6")) (property EQN (string "(I0 @ I1)"))
     )
     (instance A_CY_1
      (viewRef Netlist_representation
       (cellRef MUXCY_L (libraryRef xfpga_virtex_6))
      )
     )
     (instance A_XOR_3
      (viewRef Netlist_representation
       (cellRef XORCY (libraryRef xfpga_virtex_6))
      )
     )
     (net logic_0
      (joined (portRef CI (instanceRef A_CYI))
       (portRef CI (instanceRef A_XORI)) (portRef G (instanceRef A_GND))
      )
     )
     (net (rename A_0_ "A[0]")
      (joined (portRef (member A_3_0_ 3)) (portRef I0 (instanceRef A_LUTI))
       (portRef DI (instanceRef A_CYI))
      )
     )
     (net (rename S_2_ "S[2]")
      (joined (portRef (member S_3_0_ 1)) (portRef O (instanceRef A_XOR_2)))
     )
     (net (rename HALF_SUM_3_ "HALF_SUM[3]")
      (joined (portRef S (instanceRef A_CY_3))
       (portRef LI (instanceRef A_XOR_3)) (portRef LO (instanceRef A_LUT_3))
      )
     )
     (net (rename CARRY_1_ "CARRY[1]")
      (joined (portRef CI (instanceRef A_CY_2))
       (portRef CI (instanceRef A_XOR_2)) (portRef LO (instanceRef A_CY_1))
      )
     )
     (net (rename A_2_ "A[2]")
      (joined (portRef (member A_3_0_ 1)) (portRef I0 (instanceRef A_LUT_2))
       (portRef DI (instanceRef A_CY_2))
      )
     )
     (net (rename HALF_SUM_1_ "HALF_SUM[1]")
      (joined (portRef S (instanceRef A_CY_1))
       (portRef LI (instanceRef A_XOR_1)) (portRef LO (instanceRef A_LUT_1))
      )
     )
     (net (rename S_0_ "S[0]")
      (joined (portRef (member S_3_0_ 3)) (portRef O (instanceRef A_XORI)))
     )
     (net INC_DEC
      (joined (portRef INC_DEC) (portRef I1 (instanceRef A_LUT_1))
       (portRef I1 (instanceRef A_LUT_2)) (portRef I1 (instanceRef A_LUT_3))
      )
     )
     (net logic_1
      (joined (portRef I1 (instanceRef A_LUTI))
       (portRef P (instanceRef A_VCC))
      )
     )
     (net (rename A_3_ "A[3]")
      (joined (portRef (member A_3_0_ 0)) (portRef I0 (instanceRef A_LUT_3))
       (portRef DI (instanceRef A_CY_3))
      )
     )
     (net (rename S_1_ "S[1]")
      (joined (portRef (member S_3_0_ 2)) (portRef O (instanceRef A_XOR_1)))
     )
     (net (rename A_1_ "A[1]")
      (joined (portRef (member A_3_0_ 2)) (portRef I0 (instanceRef A_LUT_1))
       (portRef DI (instanceRef A_CY_1))
      )