📄 clkgdf.rpt
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05: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
06: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 4/24( 16%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
13: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
23: 5/24( 20%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
24: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: d:\clkgdf\clkgdf.rpt
clkgdf
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 25 cp2
DFF 13 |CONTROL:43|:24
INPUT 12 cp1
LCELL 9 |CDU60:3|:519
LCELL 8 |CDU24:4|:493
Device-Specific Information: d:\clkgdf\clkgdf.rpt
clkgdf
** CLEAR SIGNALS **
Type Fan-out Name
INPUT 9 k3
Device-Specific Information: d:\clkgdf\clkgdf.rpt
clkgdf
** EQUATIONS **
cp1 : INPUT;
cp2 : INPUT;
k1 : INPUT;
k2 : INPUT;
k3 : INPUT;
k16 : INPUT;
-- Node name is 'bee'
-- Equation name is 'bee', type is output
bee = _LC1_C5;
-- Node name is 'k3~1'
-- Equation name is 'k3~1', location is LC4_C24, type is buried.
-- synthesized logic cell
!_LC4_C24 = _LC4_C24~NOT;
_LC4_C24~NOT = LCELL(!k3);
-- Node name is 'ms1'
-- Equation name is 'ms1', type is output
ms1 = _LC1_A11;
-- Node name is 'ms2'
-- Equation name is 'ms2', type is output
ms2 = _LC2_A14;
-- Node name is 'ms3'
-- Equation name is 'ms3', type is output
ms3 = _LC1_A24;
-- Node name is 'ms4'
-- Equation name is 'ms4', type is output
ms4 = _LC2_A23;
-- Node name is 'ms5'
-- Equation name is 'ms5', type is output
ms5 = _LC3_A23;
-- Node name is 'ms6'
-- Equation name is 'ms6', type is output
ms6 = _LC1_A23;
-- Node name is 'ms7'
-- Equation name is 'ms7', type is output
ms7 = _LC1_A21;
-- Node name is 'ms8'
-- Equation name is 'ms8', type is output
ms8 = _LC1_A13;
-- Node name is 'seg0'
-- Equation name is 'seg0', type is output
seg0 = _LC1_A5;
-- Node name is 'seg1'
-- Equation name is 'seg1', type is output
seg1 = _LC3_A3;
-- Node name is 'seg2'
-- Equation name is 'seg2', type is output
seg2 = _LC2_A3;
-- Node name is 'seg3'
-- Equation name is 'seg3', type is output
seg3 = _LC1_A3;
-- Node name is 'seg4'
-- Equation name is 'seg4', type is output
seg4 = _LC2_A1;
-- Node name is 'seg5'
-- Equation name is 'seg5', type is output
seg5 = _LC3_A1;
-- Node name is 'seg6'
-- Equation name is 'seg6', type is output
seg6 = _LC1_A1;
-- Node name is 'seg7'
-- Equation name is 'seg7', type is output
seg7 = _LC1_A7;
-- Node name is '|CDU24:4|LPM_ADD_SUB:150|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B19', type is buried
!_LC8_B19 = _LC8_B19~NOT;
_LC8_B19~NOT = LCELL( _EQ001);
_EQ001 = !_LC1_B16
# !_LC7_B19;
-- Node name is '|CDU24:4|LPM_ADD_SUB:181|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_B22', type is buried
_LC5_B22 = LCELL( _EQ002);
_EQ002 = _LC1_B18 & _LC2_B22;
-- Node name is '|CDU24:4|LPM_ADD_SUB:181|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_B22', type is buried
_LC4_B22 = LCELL( _EQ003);
_EQ003 = _LC1_B18 & _LC1_B22 & _LC2_B22;
-- Node name is '|CDU24:4|:21' = '|CDU24:4|out10'
-- Equation name is '_LC1_B16', type is buried
_LC1_B16 = DFFE(!_LC1_B16, _LC2_C10, VCC, VCC, VCC);
-- Node name is '|CDU24:4|:20' = '|CDU24:4|out11'
-- Equation name is '_LC7_B19', type is buried
_LC7_B19 = DFFE( _EQ004, _LC2_C10, VCC, VCC, VCC);
_EQ004 = _LC1_B16 & _LC6_B19 & !_LC7_B19
# !_LC1_B16 & _LC6_B19 & _LC7_B19;
-- Node name is '|CDU24:4|:19' = '|CDU24:4|out12'
-- Equation name is '_LC4_B19', type is buried
_LC4_B19 = DFFE( _EQ005, _LC2_C10, VCC, VCC, VCC);
_EQ005 = _LC4_B19 & _LC6_B19 & !_LC8_B19
# !_LC4_B19 & _LC6_B19 & _LC8_B19;
-- Node name is '|CDU24:4|:18' = '|CDU24:4|out13'
-- Equation name is '_LC3_B19', type is buried
_LC3_B19 = DFFE( _EQ006, _LC2_C10, VCC, VCC, VCC);
_EQ006 = _LC3_B19 & !_LC4_B19 & _LC6_B19
# _LC3_B19 & _LC6_B19 & !_LC8_B19
# !_LC3_B19 & _LC4_B19 & _LC6_B19 & _LC8_B19;
-- Node name is '|CDU24:4|:17' = '|CDU24:4|out20'
-- Equation name is '_LC1_B18', type is buried
_LC1_B18 = DFFE( _EQ007, _LC2_C10, VCC, VCC, VCC);
_EQ007 = _LC1_B18 & !_LC1_B19 & !_LC2_B19
# !_LC1_B18 & _LC1_B19 & !_LC2_B19;
-- Node name is '|CDU24:4|:16' = '|CDU24:4|out21'
-- Equation name is '_LC2_B22', type is buried
_LC2_B22 = DFFE( _EQ008, _LC2_C10, VCC, VCC, VCC);
_EQ008 = _LC1_B18 & _LC1_B19 & !_LC2_B19 & !_LC2_B22
# !_LC1_B18 & !_LC2_B19 & _LC2_B22
# !_LC1_B19 & !_LC2_B19 & _LC2_B22;
-- Node name is '|CDU24:4|:15' = '|CDU24:4|out22'
-- Equation name is '_LC1_B22', type is buried
_LC1_B22 = DFFE( _EQ009, _LC2_C10, VCC, VCC, VCC);
_EQ009 = _LC1_B22 & !_LC2_B19 & !_LC5_B22
# _LC1_B19 & !_LC1_B22 & !_LC2_B19 & _LC5_B22
# !_LC1_B19 & _LC1_B22 & !_LC2_B19;
-- Node name is '|CDU24:4|:14' = '|CDU24:4|out23'
-- Equation name is '_LC3_B22', type is buried
_LC3_B22 = DFFE( _EQ010, _LC2_C10, VCC, VCC, VCC);
_EQ010 = !_LC2_B19 & _LC3_B22 & !_LC4_B22
# _LC1_B19 & !_LC2_B19 & !_LC3_B22 & _LC4_B22
# !_LC1_B19 & !_LC2_B19 & _LC3_B22;
-- Node name is '|CDU24:4|~114~1'
-- Equation name is '_LC6_B22', type is buried
-- synthesized logic cell
_LC6_B22 = LCELL( _EQ011);
_EQ011 = _LC1_B22
# !_LC2_B22
# _LC3_B19
# _LC3_B22;
-- Node name is '|CDU24:4|:114'
-- Equation name is '_LC2_B19', type is buried
!_LC2_B19 = _LC2_B19~NOT;
_LC2_B19~NOT = LCELL( _EQ012);
_EQ012 = !_LC8_B19
# _LC6_B22
# _LC4_B19
# _LC1_B18;
-- Node name is '|CDU24:4|:160'
-- Equation name is '_LC1_B19', type is buried
!_LC1_B19 = _LC1_B19~NOT;
_LC1_B19~NOT = LCELL( _EQ013);
_EQ013 = !_LC1_B16
# _LC4_B19
# !_LC3_B19
# _LC7_B19;
-- Node name is '|CDU24:4|~268~1'
-- Equation name is '_LC6_B19', type is buried
-- synthesized logic cell
_LC6_B19 = LCELL( _EQ014);
_EQ014 = !_LC1_B19 & !_LC2_B19;
-- Node name is '|CDU24:4|:493'
-- Equation name is '_LC2_C10', type is buried
_LC2_C10 = LCELL( _EQ015);
_EQ015 = !_LC4_C10 & _LC5_B12 & !_LC5_C10
# _LC2_C17 & _LC5_C10;
-- Node name is '|CDU60:3|:22' = '|CDU60:3|cay'
-- Equation name is '_LC5_B12', type is buried
_LC5_B12 = DFFE( _EQ016, _LC1_C10, VCC, VCC, VCC);
_EQ016 = _LC2_B3 & _LC8_B12;
-- Node name is '|CDU60:3|LPM_ADD_SUB:157|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC3_B2', type is buried
_LC3_B2 = LCELL( _EQ017);
_EQ017 = _LC1_B1 & _LC1_B9;
-- Node name is '|CDU60:3|LPM_ADD_SUB:199|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_B12', type is buried
_LC6_B12 = LCELL( _EQ018);
_EQ018 = _LC1_B12 & _LC4_B12;
-- Node name is '|CDU60:3|LPM_ADD_SUB:199|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_B12', type is buried
_LC7_B12 = LCELL( _EQ019);
_EQ019 = _LC1_B12 & _LC2_B12 & _LC4_B12;
-- Node name is '|CDU60:3|:21' = '|CDU60:3|out10'
-- Equation name is '_LC1_B1', type is buried
_LC1_B1 = DFFE(!_LC1_B1, _LC1_C10, VCC, VCC, VCC);
-- Node name is '|CDU60:3|:20' = '|CDU60:3|out11'
-- Equation name is '_LC1_B9', type is buried
_LC1_B9 = DFFE( _EQ020, _LC1_C10, VCC, VCC, VCC);
_EQ020 = _LC1_B1 & !_LC1_B9 & !_LC2_B3
# !_LC1_B1 & _LC1_B9 & !_LC2_B3;
-- Node name is '|CDU60:3|:19' = '|CDU60:3|out12'
-- Equation name is '_LC2_B2', type is buried
_LC2_B2 = DFFE( _EQ021, _LC1_C10, VCC, VCC, VCC);
_EQ021 = _LC2_B2 & !_LC2_B3 & !_LC3_B2
# !_LC2_B2 & !_LC2_B3 & _LC3_B2;
-- Node name is '|CDU60:3|:18' = '|CDU60:3|out13'
-- Equation name is '_LC1_B2', type is buried
_LC1_B2 = DFFE( _EQ022, _LC1_C10, VCC, VCC, VCC);
_EQ022 = _LC1_B2 & !_LC2_B2 & _LC4_B2
# _LC1_B2 & !_LC3_B2 & _LC4_B2
# !_LC1_B2 & _LC2_B2 & _LC3_B2 & _LC4_B2;
-- Node name is '|CDU60:3|:17' = '|CDU60:3|out20'
-- Equation name is '_LC1_B12', type is buried
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