adder_ahead8bit.cr.mti

本文件提供了用verilog HDL语言实现的8位超前进位加法器,充分说明了超前进位加法器和普通加法器之间的区别.

{D:/modelsim 5.8/examples/adder_ahead8bit/adder_ahead8bit.v} {1 {vlog -work work {D:/modelsim 5.8/examples/adder_ahead8bit/adder_ahead8bit.v}
Model Technology ModelSim SE vlog 5.8b Compiler 2004.01 Jan 26 2004
-- Compiling module add_ahead

Top level modules:
	add_ahead

} {} {}}