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arm9_fpga2_verilog是一个可以综合的用verilog写的arm9的ip软核

	    //SWAP Instruction
	    9'b0???????1: imm_32 = 32'h00000000;
	
	    //Immediate Rotates
	    default: imm_32 = {24'h000000,ir[7:0]};
	endcase
    end

//Create the 8-bit Immediate Value used as Shift Amount
always @(ir or Rs or branch or ldrh or cop_mem_id
		or ldm or stm or stri or ldri or strh)
    begin
	if (ir[27:25] == 3'h1) 		//ALU with Rotated Immediate or
	    imm_8 = {3'h0, Rs, 1'h0};   //MSR with Rotated Immediate
	else if (branch || ldrh || stri || ldri || ldm || stm || strh)
	    imm_8 = 8'h00;
	else if (cop_mem_id)
	    imm_8 = 8'h2;
	else				
	    imm_8 = {2'h0,ir[11:7]};
    end

//Mux the Forwarding Data for Op1
//Priority is Important Here!!!
always @(write_Rd_ex or Rd_ex or index_a or write_Rn_ex
		or Rn_ex or write_Rd_me or Rd_me or base_ex 
		or write_Rn_me or Rn_me or ex_result
		or me_result or base_me)
    begin
	if ((write_Rd_ex) && (index_a == Rd_ex))
	    forwarded_op1 = ex_result;
	else if ((write_Rn_ex) && (index_a == Rn_ex))
	    forwarded_op1 = base_ex;
	else if ((write_Rd_me) && (index_a == Rd_me))
	    forwarded_op1 = me_result;
	else
	    forwarded_op1 = base_me;
    end

//Mux the Forwarding Data for Op2
//Priority is important here!!!
always @(write_Rd_ex or Rd_ex or index_b or write_Rn_ex
                or Rn_ex or write_Rd_me or Rd_me or base_ex
                or write_Rn_me or Rn_me or ex_result
                or me_result or base_me)
    begin
	if ((write_Rd_ex) && (index_b == Rd_ex))
            forwarded_op2 = ex_result;
        else if ((write_Rn_ex) && (index_b == Rn_ex))
	    forwarded_op2 = base_ex;
        else if ((write_Rd_me) && (index_b == Rd_me))
            forwarded_op2 = me_result;
        else                                              
            forwarded_op2 = base_me;
    end     

//Set Op1
always @(rf_a or forward_op1 or forwarded_op1 or pc_if or branch 
		or und or swi or exception_id)
    begin
	if (branch | und | swi | exception_id) //Op1 is PC
	    op1 = pc_if;
 	else if (forward_op1)		//Op1 from Unwritten Result
	    op1 = forwarded_op1;
	else 				//Op1 is Rn/Rs
	    op1 = rf_a;
    end

//Set Op2
always @(branch or ir or forward_op2 or forwarded_op2 or index_b 
		or imm_32 or op2_is_imm or rf_b)
    begin
	if (branch)	 		//Op2 is Branch Offset
	    op2 = {{6{ir[23]}},ir[23:0],2'b00};
	else if (forward_op2)		//Op2 from Unwritten result
	    op2 = forwarded_op2;	
        else if (op2_is_imm)            //Op2 is Imm Value
            op2 = imm_32;
	else				//Op2 is Rm/Rd
	    op2 = rf_b;
    end

//Set up the Auxillary Data Operand
always @(forward_aux or rf_b or forwarded_op2)
    begin
	if (forward_aux)
	    aux_data_id = forwarded_op2;
	else
	    aux_data_id = rf_b;
    end

//Set the Shift Amount
always @(rf_a or second_nlu or imm_8 or forwarded_op1 or forward_sh_amt 
		or str)
    begin
	if (forward_sh_amt)
	    shift_amount = forwarded_op1[7:0];
	else if (second_nlu & !str)
	    shift_amount = rf_a[7:0];
	else
	    shift_amount = imm_8;
    end

/*Set the Shift Type.
	shift_type[1:0]		2'b00: LSL
				2'b01: LSR
				2'b10: ASR
				2'b11: ROR
   	shift_type[2]		1'b1:  ALU Shift Reg by Imm
                        	1'b0:  All Other Shifts
*/
always @(ir or msr or ldm or stm or cop_mem_id or und)
    begin
	if (ldm || stm || cop_mem_id || und)
	    shift_type = 3'h0;
	else if (ir[27:26] == 2'h1)
            shift_type = {1'b0,ir[6:5]};
	else if (!ir[25] & !msr) 
	    shift_type = {~ir[4],ir[6:5]};
	else
	    shift_type = 3'h3;
    end

//Decode the Instruction Type
always @(ir or Rd)
    begin
	case(ir[27:20]) //synopsys full_case parallel_case
	    8'h00: begin
			if (ir[11:4] == 8'h0B)
				inst_type = `STRH;
		   	else if (ir[7:4] == 4'h9)
				inst_type = `MUL;
		   	else
				inst_type = `ALU;
		    end

	    8'h01: begin
                        if (ir[7:4] == 4'h9)
                            inst_type = `MUL;
                        else if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                   end  

            8'h02: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else if (ir[7:4] == 4'h9)
                            inst_type = `MUL;
                        else
                            inst_type = `ALU;
                   end  

            8'h03: begin
                        if (ir[7:4] == 4'h9)
                            inst_type = `MUL;
                        else if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                   end  

            8'h04: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else
                            inst_type = `ALU;   
                   end

            8'h05: begin
                        if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;  
                        else
                            inst_type = `ALU;
                   end  
                        
            8'h06: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else
                            inst_type = `ALU;
                   end  
                        
            8'h07: begin
                        if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                   end  
                        
            8'h08: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else
                            inst_type = `ALU;
                   end  
                        
            8'h09: begin
                        if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else 
                            inst_type = `ALU; 
                   end
                
            8'h0A: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else
                            inst_type = `ALU;
                   end
                        
            8'h0B: begin
                        if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                   end
                        
            8'h0C: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h0D: begin
                        if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h0E: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else if (ir[7:4] == 4'h9)
                             inst_type = `MULL;   
                        else
                            inst_type = `ALU;
                    end
                        
            8'h0F: begin
                        if (ir[7:4] == 4'h9)
                            inst_type = `MULL;
                        else if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h10: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else if (ir[11:4] == 8'h09)
                            inst_type = `SWAP;
                        else if ((ir[11:0] == 8'h00) & (ir[21:16] == 6'h0F))
                            inst_type = `MRS;
                        else
                            inst_type = `ALU;
                    end
                       
            8'h11: begin 
                        if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h12: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else if ((Rd == 4'hF) && (ir[18:17] == 2'b00))
                            inst_type = `MSR;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h13: begin
                        if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end
                        
                
            8'h14: begin   
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else if (ir[11:4] == 8'h09)
                            inst_type = `SWAP;
                        else if ((ir[11:4] == 8'h00) && (ir[21:16] == 6'h0F))
                            inst_type = `MRS; 
                        else
                            inst_type = `ALU;
                    end
                        
            8'h15: begin 
                        if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h16: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else if ((Rd == 4'hF) && (ir[18:17] == 2'b00))
                            inst_type = `MSR;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h17: begin
                        if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end
                        
            8'h18: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else
                            inst_type = `ALU;
                    end  
                        
            8'h19: begin
                        if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end  
                        
            8'h1A: begin
                        if (ir[11:4] == 8'h0B)
                            inst_type = `STRH;
                        else
                            inst_type = `ALU;
                    end  
                        
            8'h1B: begin
                        if ((ir[11:4] & 8'hF9) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end  
                        
            8'h1C: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else
                            inst_type = `ALU;
                    end  
                        
            8'h1D: begin
                        if ((ir[11:4] & 8'h09) == 8'h09)
                            inst_type = `LDRH;
                        else
                            inst_type = `ALU;
                    end  
                        
            8'h1E: begin
                        if (ir[7:4] == 4'hB)
                            inst_type = `STRH;
                        else
                            inst_type = `ALU;