phase_test.tan.rpt

来自「verilog编写基于fpga的鉴相器模块」· RPT 代码 · 共 213 行 · 第 1/5 页

; 4.548 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[4]  ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.317 ns                  ; 2.769 ns                ;
; 4.548 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.317 ns                  ; 2.769 ns                ;
; 4.925 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.297 ns                  ; 2.372 ns                ;
; 4.925 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.297 ns                  ; 2.372 ns                ;
; 4.925 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[28] ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.297 ns                  ; 2.372 ns                ;
; 4.925 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[29] ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.297 ns                  ; 2.372 ns                ;
; 4.925 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[30] ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.297 ns                  ; 2.372 ns                ;
; 4.925 ns                                ; None                                                ; phase_test:inst|sclr                                                                     ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; clk                                            ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 8.115 ns                    ; 7.297 ns                  ; 2.372 ns                ;
; 6.528 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[2]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.191 ns                ;
; 6.603 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[3]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.116 ns                ;
; 6.605 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[2]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.114 ns                ;
; 6.605 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[2]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.114 ns                ;
; 6.605 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[2]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[28] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.114 ns                ;
; 6.605 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[2]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[29] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.114 ns                ;
; 6.605 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[2]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[30] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.114 ns                ;
; 6.616 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[1]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.103 ns                ;
; 6.680 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[3]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.039 ns                ;
; 6.680 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[3]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.039 ns                ;
; 6.680 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[3]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[28] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.039 ns                ;
; 6.680 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[3]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[29] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.039 ns                ;
; 6.680 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[3]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[30] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.039 ns                ;
; 6.684 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.035 ns                ;
; 6.693 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[1]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.026 ns                ;
; 6.693 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[1]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.026 ns                ;
; 6.693 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[1]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[28] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.026 ns                ;
; 6.693 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[1]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[29] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.026 ns                ;
; 6.693 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[1]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[30] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 3.026 ns                ;
; 6.746 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[0]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.973 ns                ;
; 6.761 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.958 ns                ;
; 6.761 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.958 ns                ;
; 6.761 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[28] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.958 ns                ;
; 6.761 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[29] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.958 ns                ;
; 6.761 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[5]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[30] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.958 ns                ;
; 6.785 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[7]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.739 ns                  ; 2.954 ns                ;
; 6.823 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[0]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.896 ns                ;
; 6.823 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[0]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.896 ns                ;
; 6.823 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[0]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[28] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.896 ns                ;
; 6.823 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[0]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[29] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.896 ns                ;
; 6.823 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[0]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[30] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.896 ns                ;
; 6.850 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[4]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.719 ns                  ; 2.869 ns                ;
; 6.859 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[8]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[31] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.739 ns                  ; 2.880 ns                ;
; 6.862 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[7]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[26] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.739 ns                  ; 2.877 ns                ;
; 6.862 ns                                ; Restricted to 275.03 MHz ( period = 3.64 ns )       ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[7]  ; phase_counter:inst1|lpm_counter:lpm_counter_component|cntr_2ii:auto_generated|safe_q[27] ; phase_pll:inst12|altpll:altpll_component|_clk0 ; phase_pll:inst12|altpll:altpll_component|_clk0 ; 10.000 ns                   ; 9.739 ns                  ; 2.877 ns                ;