fdiv.fit.eqn

基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码

B3_dffs[22]_p2_out = !B3_dffs[31] & B3_dffs[22];
B3_dffs[22]_or_out = B3_dffs[22]_p1_out # B3_dffs[22]_p2_out;
B3_dffs[22]_reg_input = B3_dffs[22]_or_out;
B3_dffs[22] = TFFE(B3_dffs[22]_reg_input, A1L21Q, , , );


--B2_dffs[23] is lpm_counter:CNT2_rtl_1|dffs[23] at LC24
B2_dffs[23]_p1_out = B2_dffs[31] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[23]_p2_out = !B2_dffs[31] & B2_dffs[23];
B2_dffs[23]_or_out = B2_dffs[23]_p1_out # B2_dffs[23]_p2_out;
B2_dffs[23]_reg_input = B2_dffs[23]_or_out;
B2_dffs[23] = TFFE(B2_dffs[23]_reg_input, A1L21Q, , , );


--B3_dffs[23] is lpm_counter:CNT3_rtl_2|dffs[23] at LC56
B3_dffs[23]_p1_out = B3_dffs[31] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[23]_p2_out = !B3_dffs[31] & B3_dffs[23];
B3_dffs[23]_or_out = B3_dffs[23]_p1_out # B3_dffs[23]_p2_out;
B3_dffs[23]_reg_input = B3_dffs[23]_or_out;
B3_dffs[23] = TFFE(B3_dffs[23]_reg_input, A1L21Q, , , );


--B2_dffs[24] is lpm_counter:CNT2_rtl_1|dffs[24] at LC27
B2_dffs[24]_p1_out = B2_dffs[31] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[24]_p2_out = !B2_dffs[31] & B2_dffs[24];
B2_dffs[24]_or_out = B2_dffs[24]_p1_out # B2_dffs[24]_p2_out;
B2_dffs[24]_reg_input = B2_dffs[24]_or_out;
B2_dffs[24] = TFFE(B2_dffs[24]_reg_input, A1L21Q, , , );


--B3_dffs[24] is lpm_counter:CNT3_rtl_2|dffs[24] at LC63
B3_dffs[24]_p1_out = B3_dffs[31] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[24]_p2_out = !B3_dffs[31] & B3_dffs[24];
B3_dffs[24]_or_out = B3_dffs[24]_p1_out # B3_dffs[24]_p2_out;
B3_dffs[24]_reg_input = B3_dffs[24]_or_out;
B3_dffs[24] = TFFE(B3_dffs[24]_reg_input, A1L21Q, , , );


--B2_dffs[25] is lpm_counter:CNT2_rtl_1|dffs[25] at LC28
B2_dffs[25]_p1_out = B2_dffs[31] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[25]_p2_out = !B2_dffs[31] & B2_dffs[25];
B2_dffs[25]_or_out = B2_dffs[25]_p1_out # B2_dffs[25]_p2_out;
B2_dffs[25]_reg_input = B2_dffs[25]_or_out;
B2_dffs[25] = TFFE(B2_dffs[25]_reg_input, A1L21Q, , , );


--B3_dffs[25] is lpm_counter:CNT3_rtl_2|dffs[25] at LC64
B3_dffs[25]_p1_out = B3_dffs[31] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[25]_p2_out = !B3_dffs[31] & B3_dffs[25];
B3_dffs[25]_or_out = B3_dffs[25]_p1_out # B3_dffs[25]_p2_out;
B3_dffs[25]_reg_input = B3_dffs[25]_or_out;
B3_dffs[25] = TFFE(B3_dffs[25]_reg_input, A1L21Q, , , );


--B2_dffs[26] is lpm_counter:CNT2_rtl_1|dffs[26] at LC29
B2_dffs[26]_p1_out = B2_dffs[31] & B2_dffs[25] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[26]_p2_out = !B2_dffs[31] & B2_dffs[26];
B2_dffs[26]_or_out = B2_dffs[26]_p1_out # B2_dffs[26]_p2_out;
B2_dffs[26]_reg_input = B2_dffs[26]_or_out;
B2_dffs[26] = TFFE(B2_dffs[26]_reg_input, A1L21Q, , , );


--B3_dffs[26] is lpm_counter:CNT3_rtl_2|dffs[26] at LC12
B3_dffs[26]_p1_out = B3_dffs[31] & B3_dffs[25] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[26]_p2_out = !B3_dffs[31] & B3_dffs[26];
B3_dffs[26]_or_out = B3_dffs[26]_p1_out # B3_dffs[26]_p2_out;
B3_dffs[26]_reg_input = B3_dffs[26]_or_out;
B3_dffs[26] = TFFE(B3_dffs[26]_reg_input, A1L21Q, , , );


--B2_dffs[27] is lpm_counter:CNT2_rtl_1|dffs[27] at LC30
B2_dffs[27]_p1_out = B2_dffs[31] & B2_dffs[26] & B2_dffs[25] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[27]_p2_out = !B2_dffs[31] & B2_dffs[27];
B2_dffs[27]_or_out = B2_dffs[27]_p1_out # B2_dffs[27]_p2_out;
B2_dffs[27]_reg_input = B2_dffs[27]_or_out;
B2_dffs[27] = TFFE(B2_dffs[27]_reg_input, A1L21Q, , , );


--B3_dffs[27] is lpm_counter:CNT3_rtl_2|dffs[27] at LC8
B3_dffs[27]_p1_out = B3_dffs[31] & B3_dffs[26] & B3_dffs[25] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[27]_p2_out = !B3_dffs[31] & B3_dffs[27];
B3_dffs[27]_or_out = B3_dffs[27]_p1_out # B3_dffs[27]_p2_out;
B3_dffs[27]_reg_input = B3_dffs[27]_or_out;
B3_dffs[27] = TFFE(B3_dffs[27]_reg_input, A1L21Q, , , );


--B2_dffs[28] is lpm_counter:CNT2_rtl_1|dffs[28] at LC21
B2_dffs[28]_p1_out = B2_dffs[31] & B2_dffs[27] & B2_dffs[26] & B2_dffs[25] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[28]_p2_out = !B2_dffs[31] & B2_dffs[28];
B2_dffs[28]_or_out = B2_dffs[28]_p1_out # B2_dffs[28]_p2_out;
B2_dffs[28]_reg_input = B2_dffs[28]_or_out;
B2_dffs[28] = TFFE(B2_dffs[28]_reg_input, A1L21Q, , , );


--B3_dffs[28] is lpm_counter:CNT3_rtl_2|dffs[28] at LC7
B3_dffs[28]_p1_out = B3_dffs[31] & B3_dffs[27] & B3_dffs[26] & B3_dffs[25] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[28]_p2_out = !B3_dffs[31] & B3_dffs[28];
B3_dffs[28]_or_out = B3_dffs[28]_p1_out # B3_dffs[28]_p2_out;
B3_dffs[28]_reg_input = B3_dffs[28]_or_out;
B3_dffs[28] = TFFE(B3_dffs[28]_reg_input, A1L21Q, , , );


--B2_dffs[29] is lpm_counter:CNT2_rtl_1|dffs[29] at LC32
B2_dffs[29]_p1_out = B2_dffs[31] & B2_dffs[28] & B2_dffs[27] & B2_dffs[26] & B2_dffs[25] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[29]_p2_out = !B2_dffs[31] & B2_dffs[29];
B2_dffs[29]_or_out = B2_dffs[29]_p1_out # B2_dffs[29]_p2_out;
B2_dffs[29]_reg_input = B2_dffs[29]_or_out;
B2_dffs[29] = TFFE(B2_dffs[29]_reg_input, A1L21Q, , , );


--B3_dffs[29] is lpm_counter:CNT3_rtl_2|dffs[29] at LC9
B3_dffs[29]_p1_out = B3_dffs[31] & B3_dffs[28] & B3_dffs[27] & B3_dffs[26] & B3_dffs[25] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[29]_p2_out = !B3_dffs[31] & B3_dffs[29];
B3_dffs[29]_or_out = B3_dffs[29]_p1_out # B3_dffs[29]_p2_out;
B3_dffs[29]_reg_input = B3_dffs[29]_or_out;
B3_dffs[29] = TFFE(B3_dffs[29]_reg_input, A1L21Q, , , );


--B2_dffs[30] is lpm_counter:CNT2_rtl_1|dffs[30] at LC31
B2_dffs[30]_p1_out = B2_dffs[31] & B2_dffs[29] & B2_dffs[28] & B2_dffs[27] & B2_dffs[26] & B2_dffs[25] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0];
B2_dffs[30]_p2_out = !B2_dffs[31] & B2_dffs[30];
B2_dffs[30]_or_out = B2_dffs[30]_p1_out # B2_dffs[30]_p2_out;
B2_dffs[30]_reg_input = B2_dffs[30]_or_out;
B2_dffs[30] = TFFE(B2_dffs[30]_reg_input, A1L21Q, , , );


--B3_dffs[30] is lpm_counter:CNT3_rtl_2|dffs[30] at LC13
B3_dffs[30]_p1_out = B3_dffs[31] & B3_dffs[29] & B3_dffs[28] & B3_dffs[27] & B3_dffs[26] & B3_dffs[25] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0];
B3_dffs[30]_p2_out = !B3_dffs[31] & B3_dffs[30];
B3_dffs[30]_or_out = B3_dffs[30]_p1_out # B3_dffs[30]_p2_out;
B3_dffs[30]_reg_input = B3_dffs[30]_or_out;
B3_dffs[30] = TFFE(B3_dffs[30]_reg_input, A1L21Q, , , );


--B2_dffs[31] is lpm_counter:CNT2_rtl_1|dffs[31] at LC18
B2_dffs[31]_p1_out = B2_dffs[30] & B2_dffs[29] & B2_dffs[28] & B2_dffs[27] & B2_dffs[26] & B2_dffs[25] & B2_dffs[24] & B2_dffs[23] & B2_dffs[22] & B2_dffs[21] & B2_dffs[20] & B2_dffs[19] & B2_dffs[18] & B2_dffs[17] & B2_dffs[16] & B2_dffs[15] & B2_dffs[14] & B2_dffs[13] & B2_dffs[12] & B2_dffs[11] & B2_dffs[10] & B2_dffs[9] & B2_dffs[8] & B2_dffs[7] & B2_dffs[6] & B2_dffs[5] & B2_dffs[4] & B2_dffs[3] & B2_dffs[2] & B2_dffs[1] & B2_dffs[0] & B2_dffs[31];
B2_dffs[31]_or_out = B2_dffs[31]_p1_out;
B2_dffs[31]_reg_input = B2_dffs[31]_or_out;
B2_dffs[31] = TFFE(B2_dffs[31]_reg_input, A1L21Q, , , );


--B3_dffs[31] is lpm_counter:CNT3_rtl_2|dffs[31] at LC6
B3_dffs[31]_p1_out = B3_dffs[30] & B3_dffs[29] & B3_dffs[28] & B3_dffs[27] & B3_dffs[26] & B3_dffs[25] & B3_dffs[24] & B3_dffs[23] & B3_dffs[22] & B3_dffs[21] & B3_dffs[20] & B3_dffs[19] & B3_dffs[18] & B3_dffs[17] & B3_dffs[16] & B3_dffs[15] & B3_dffs[14] & B3_dffs[13] & B3_dffs[12] & B3_dffs[11] & B3_dffs[10] & B3_dffs[9] & B3_dffs[8] & B3_dffs[7] & B3_dffs[6] & B3_dffs[5] & B3_dffs[4] & B3_dffs[3] & B3_dffs[2] & B3_dffs[1] & B3_dffs[0] & B3_dffs[31];
B3_dffs[31]_or_out = B3_dffs[31]_p1_out;
B3_dffs[31]_reg_input = B3_dffs[31]_or_out;
B3_dffs[31] = TFFE(B3_dffs[31]_reg_input, A1L21Q, , , );


--A1L01Q is f60hz~reg0 at LC17
A1L01Q_p1_out = !B2_dffs[30] & !B2_dffs[29] & !B2_dffs[28] & !B2_dffs[27] & !B2_dffs[26] & !B2_dffs[25] & !B2_dffs[24] & !B2_dffs[23] & !B2_dffs[22] & !B2_dffs[21] & !B2_dffs[20] & !B2_dffs[19] & !B2_dffs[18] & !B2_dffs[17] & !B2_dffs[16] & !B2_dffs[15] & !B2_dffs[14] & !B2_dffs[13] & !B2_dffs[12] & !B2_dffs[11] & !B2_dffs[10] & !B2_dffs[9] & !B2_dffs[8] & !B2_dffs[7] & !B2_dffs[6] & !B2_dffs[5] & !B2_dffs[4] & !B2_dffs[3] & !B2_dffs[2] & !B2_dffs[1];
A1L01Q_or_out = A1L01Q_p1_out # B2_dffs[31];
A1L01Q_reg_input = !(A1L01Q_or_out);
A1L01Q = DFFE(A1L01Q_reg_input, A1L21Q, , , );


--A1L8Q is f1hz~reg0 at LC11
A1L8Q_p0_out = !B3_dffs[30] & !B3_dffs[29] & !B3_dffs[28] & !B3_dffs[27] & !B3_dffs[26] & !B3_dffs[25] & !B3_dffs[24] & !B3_dffs[23] & !B3_dffs[22] & !B3_dffs[21] & !B3_dffs[20] & !B3_dffs[19] & !B3_dffs[18] & !B3_dffs[17] & !B3_dffs[16] & !B3_dffs[15] & !B3_dffs[14] & !B3_dffs[13] & !B3_dffs[12] & !B3_dffs[11] & !B3_dffs[10] & !B3_dffs[9] & !B3_dffs[8] & !B3_dffs[5] & !B3_dffs[4] & !B3_dffs[3] & !B3_dffs[0];
A1L8Q_p1_out = !B3_dffs[6] & !B3_dffs[30] & !B3_dffs[29] & !B3_dffs[28] & !B3_dffs[27] & !B3_dffs[26] & !B3_dffs[25] & !B3_dffs[24] & !B3_dffs[23] & !B3_dffs[22] & !B3_dffs[21] & !B3_dffs[20] & !B3_dffs[19] & !B3_dffs[18] & !B3_dffs[17] & !B3_dffs[16] & !B3_dffs[15] & !B3_dffs[14] & !B3_dffs[13] & !B3_dffs[12] & !B3_dffs[11] & !B3_dffs[10] & !B3_dffs[9] & !B3_dffs[8];
A1L8Q_p2_out = !B3_dffs[30] & !B3_dffs[29] & !B3_dffs[28] & !B3_dffs[27] & !B3_dffs[26] & !B3_dffs[25] & !B3_dffs[24] & !B3_dffs[23] & !B3_dffs[22] & !B3_dffs[21] & !B3_dffs[20] & !B3_dffs