📄 usb_new_usb_int_str.vhdl
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--
-- P H I L I P S C O M P A N Y R E S T R I C T E D
--
-- Copyright (c) 1998.
--
-- Philips Electronics N.V.
--
-- Philips Semiconductors
-- Interconnectivity and Processor Peripheral group
-- Bangalore,India
-- All rights reserved. Reproduction in whole or in part is prohibited
-- without the written permission of the copyright owner.
--
--------------------------------------------------------------------------------
--
-- File : usb_new_usb_int_str.vhdl
--
-- Module : USB_INT
--
-- Project : VPB bus Interface to USB 1.1 Device(USBFS22)
--
-- Author :
--
-- Description : The architecture of USB_INT block. This module includes the
-- following sub modules:
-- CLKREC,
-- DEVICE_HANDLER,
-- RGEN,
-- UC_HANDLER,
-- SIE,
-- SIEINTERFACE,
-- UPSTREAMLED,
-- TIMERS_SF,
-- EP_HANDLER,
-- PVCI_ENG.
--
-- Status :
--
-- Contact address :
--
--------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
library work;
use work.PCK_GENERAL.all;
use work.PCK_CONFIGURATION.all;
use work.PCK_SETUP.all;
use work.PCK_HANDLERS.all;
use work.PCK_USB.all;
library work;
use work.PCK_APB.all ;
library work;
use work.all;
library work;
use work.all;
architecture STR of USB_INT is
component CLKREC
port (
HB_UsbDifBit: in one_bit;
HB_UsbLineBits: in two_bits;
CR_UsbLineBits: out two_bits;
CR_DebugRecDataP: out one_bit;
CR_DebugRecDataN: out one_bit;
Clk12MHz_O: out one_bit;
Clk12MHzRef_O: out one_bit;
SIE_CREnable: in boolean;
TM_Suspend: in boolean;
Clk48MHz: in one_bit;
Reset48MHz_N: in one_bit;
PU_Reset_N: in one_bit
);
end component;
component DEVICE_HANDLER
generic (
ID: integer := 0
);
port (
DataToHandlers: in T_SIE_to_Handlers;
DataFromHandlers_In: in T_Handlers_to_SIE;
DataFromHandlers_Out: out T_Handlers_to_SIE;
DataFromUC: in T_UC_to_Handlers;
DataToUC_In: in T_Handlers_to_UC;
DataToUC_Out: out T_Handlers_to_UC;
VBusAvailable: in boolean;
DH_Connect: out boolean;
TM_1kHzPulse: in one_bit;
ChipID: in S_ChipID;
ConfigArray: out S_ConfigArray;
PINConfigArray: in S_PINConfigArray;
DH_Interrupt_Ep0: out boolean;
DH_Interrupt_Ep1: out boolean;
DH_Interrupt_Ep2: out boolean;
DH_Interrupt_Ep3: out boolean;
DH_Interrupt_Ep4: out boolean;
DH_Interrupt_Ep5: out boolean;
DH_Interrupt_Ep6: out boolean;
DH_Interrupt_Ep7: out boolean;
DH_Interrupt_Dev: out boolean;
RG_SetSE0Int: in boolean;
TM_Suspend: in boolean;
TM_RemoteWakeupEvent: in boolean; -- There was remote wake up
FsClk: in one_bit;
PUReset_N: in one_bit
);
end component;
component RGEN
port (
USB_Reset_O_N: out one_bit;
RG_SetSE0Int: out boolean;
RG_BUSReset: out boolean;
Reset_N: out one_bit;
PUReset_N: out one_bit;
Reset12MHzRef_N: out one_bit;
Reset48MHz_N: out one_bit;
UP_DsLineBits: in two_bits;
PU_Reset_N: in one_bit;
FsClk: in one_bit;
Clk12MHzRef: in one_bit;
Clk48MHz: in one_bit;
ConfigArray: in S_ConfigArray;
RG_BusActive: out boolean;
TestMode: in one_bit
);
end component;
component SIE
port (
CR_UsbLineBits: in two_bits;
SIE_TxLogValue: out T_UsbLog_enum;
SIE_UsbEnable_N: out one_bit;
SIE_RxPid: out T_Pid_enum;
SIE_RxPidRdy: out boolean;
SIE_RxData: out S_UsbWord_bits;
SIE_RxDataRdy: out boolean;
SIE_SOFByte1: out boolean;
SIE_SOFByte2: out boolean;
SIE_RxEOP: out boolean;
MM_TxData1Pid: in boolean;
MM_TxData: in S_UsbWord_bits;
MM_TxDataRdy: in boolean;
SIE_TxDataAck: out boolean;
MM_EmbeddedBabbled: in boolean;
SIE_RxErrorType: out T_PACKET_ERROR_enum;
SIE_RxError: out boolean;
SIE_StartEndpSearch: out boolean;
MM_EndpSearchReady: in boolean;
MM_EndpSearchSelected: in boolean;
MM_Accepted: in boolean;
MM_Stalled: in boolean;
MM_ISO: in boolean;
SIE_LowSpeedTransaction: out boolean;
SIE_RxSOF: out boolean;
SIE_CREnable: out boolean;
TM_SendResume: in boolean;
SIE_RxUsbLogValue: out T_UsbLog_enum;
ConfigArray: in S_ConfigArray;
FsClk: in one_bit;
Reset_N: in one_bit
);
end component;
component SIEINTERFACE
port (
SIE_StartEndpSearch: in boolean;
MM_EndpSearchReady: out boolean;
MM_EndpSearchSelected: out boolean;
SIE_RxEOP: in boolean;
SIE_RxPid: in T_Pid_enum;
SIE_RxPidRdy: in boolean;
SIE_RxData: in S_UsbWord_bits;
SIE_RxDataRdy: in boolean;
SIE_RxErrorType: in T_PACKET_ERROR_enum;
SIE_RxError: in boolean;
SIE_SOFByte1: in boolean;
SIE_SOFByte2: in boolean;
MM_TxData: out S_UsbWord_bits;
MM_TxDataRdy: out boolean;
MM_TxData1Pid: out boolean;
SIE_TxDataAck: in boolean;
MM_Accepted: out boolean;
MM_Stalled: out boolean;
MM_ISO: out boolean;
MM_Resume: out boolean;
MM_NeedClock: out boolean;
TM_EOF1: in boolean;
DataToHandlers: out T_SIE_to_Handlers;
DataFromHandlers_In: in T_Handlers_to_SIE;
DataFromHandlers_Out: out T_Handlers_to_SIE;
MM_EmbeddedBabbled: out boolean;
SH_Succes: out boolean;
SH_Configured: out boolean;
ConfigArray: in S_ConfigArray;
FsClk: in one_bit;
Reset_N: in one_bit
);
end component;
component TIMERS_SF
port (
MM_Resume: in boolean;
TM_SendResume: out boolean;
PI_NeedClock: in boolean;
MM_NeedClock: in boolean;
EX_NeedClock: in boolean;
RG_BusActive: in boolean;
TM_Suspend: out boolean;
TM_Idle5ms: out boolean;
USB_Suspended: out one_bit;
Suspend_In: in boolean;
TM_ClockOn: out one_bit;
TM_ClockRestarted: out boolean;
RemoteWakeup: in boolean;
SIE_RxSOF: in boolean;
TM_EOF1: out boolean;
TM_EOF2: out boolean;
FsClk: in one_bit;
PUReset_N: in one_bit;
RG_SetSE0Int: in boolean;
ConfigArray: in S_ConfigArray;
USB_FrameClock: out one_bit;
TM_IsoToggle: out integer range 0 to 1;
TM_1kHzPulse: out one_bit;
TestMode: in one_bit
);
end component;
component UC_HANDLER
generic (
ID: integer := 0
);
port (
DataFromUC: in T_UC_to_Handlers;
DataToUC_In: in T_Handlers_to_UC;
DataToUC_Out: out T_Handlers_to_UC;
RG_SetSE0Int: in boolean;
HC_ResetDevice: in booleans(N_EMBEDDED_PORTS -1 downto 0);
DH_Connect: in boolean;
DataFromHandlers_In: in T_Handlers_to_SIE;
DataFromHandlers_Out: out T_Handlers_to_SIE;
DataToHandlers: in T_SIE_to_Handlers;
Sie_Read: out one_bit;
Sie_Write: out one_bit;
Uc_To_Pi: out T_UC_to_pi_handler;
Pi_To_Uc: in T_Pi_To_Uc_handler;
SIE_EndTransfer: out one_bit;
Start_In_Transfer: out one_bit;
N_Data_EP : in nine_bits;
RxError_SIE: out boolean;
SIE_N_Data: out integer range 0 to MAX_OVERFLOW_SIZE;
TestMode: in one_bit; -- active high
ConfigArray: in S_ConfigArray; -- Configuration Array
PUReset_N: in one_bit; -- Asynchr. power up reset
FsClk: in one_bit; -- Recovered Clock
EPBufferInfo: out T_EPBufferInfo;
TM_IsoToggle: in integer range 0 to 1
);
end component;
component EP_HANDLER
port (
-- Interface to SYNCHRONIZER module
If_Busy: in boolean; -- Interface busy
Data_In: in byte; -- IN Data to PI handler
CommandCodeChannel: in eleven_bits; -- Command code
CmdCodeValid_Out: in boolean; -- Command code valid
Trans_Enable: out one_bit; -- Transfer to Interface enabled
Read: out one_bit; -- Read from Interface
Data_Out: out byte; -- Data from PI handler.
EP_number: out Int_EndPointType; -- Physical endpoint
End_Transfer: out one_bit; -- End of packet data
EndTransfer_Cmd: out one_bit; -- End of command data
Rx_N_data: out integer range 0 to MAX_OVERFLOW_SIZE; -- Size of OUT packet
USBEp0Intr_Set: out one_bit; -- USB Ep0 interrupt
USBEp1Intr_Set: out one_bit; -- USB Ep1 interrupt
USBEp2Intr_Set: out one_bit; -- USB Ep2 interrupt
USBEp3Intr_Set: out one_bit; -- USB Ep3 interrupt
USBEp4Intr_Set: out one_bit; -- USB Ep4 interrupt
USBEp5Intr_Set: out one_bit; -- USB Ep5 interrupt
USBEp6Intr_Set: out one_bit; -- USB Ep6 interrupt
USBEp7Intr_Set: out one_bit; -- USB Ep6 interrupt
USBDevIntr_Set: out one_bit; -- USB Dev interrupt
USBToggleBuffer: out T_ToggleArray; -- USB toggle buffer
UCToggleBuffer: out T_ToggleArray; -- UC toggle buffer
RxError: out boolean; -- Error in packet transfer
FullBuffer_UC: out T_Full; -- Full buffer
PI_IsoToggle: out integer range 0 to 1; -- ISO toggle buffer
CommandData: out byte; -- Command data
CmdAccept: out boolean; -- Command accepted
CmdDataValid: out boolean; -- Command data valid
reg_ram_read: out one_bit; -- Start of IN transfer
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