usb_new_usbpvci_dft_ent.vhdl

实现USB接口功能的VHDL和verilog完整源代码

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--
--  P H I L I P S  C O M P A N Y  R E S T R I C T E D
--                                         
--  Copyright (c) 1998.                    
--
--  Philips Electronics N.V.
--
--  Philips Semiconductors
--  Interconnectivity and Processor Peripheral group
--  Bangalore,India
--  All rights reserved. Reproduction in whole or in part is prohibited
--  without the written permission of the copyright owner.
--
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--
--  File            : usb_new_usbpvci_dFt_ent.vhdl 
--
--  Module          : USBPVCI_DfT 
--
--  Project         : VPB bus Interface to USB 1.1 Device(USBFS22)
--
--  Author          :              
--
--  Description     : The architecture of USBPVCI_DfT block
--
--  Status          : 
--
--  Contact address : 
--
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library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity USBPVCI_DfT is
  port(
       -- Clocks
       USB_MainClk:              in  std_logic;                     -- Main clock
       USB_NeedClk:              out std_logic;                     -- Need clock
       USB_BitClk:               in  std_logic;                     -- Bit clock in
       USB_BitClk_Out:           out std_logic;                     -- Bit clock out

       -- Connect
       USB_Connect_N:            out std_logic;                     -- Controls switch for softconnect
       USB_VBus:                 in  std_logic;                     -- Bus power is present

       -- Test mode signals
       USB_TestMode:             in  std_logic;                     -- Select test mode
       USB_Test_Resetn:          in  std_logic;                     -- Resetn during testmode

       -- Raminterface 
       USB_RxRAM_E_N:            out std_logic;                     -- RxRAM enable
       USB_RxRAM_W_N:            out std_logic;                     -- RxRAM write
       USB_RxRAM_G_N:            out std_logic;                     -- RxRAM read
       USB_RxRAM_A:              out std_logic_vector(6 downto 0);  -- RxRAM address 
       USB_RxRAM_DQ_In:          in  std_logic_vector(31 downto 0); -- RxRAM out data
       USB_RxRAM_DQ_Out:         out std_logic_vector(31 downto 0); -- RxRAM in data
       USB_TxRAM_E_N:            out std_logic;                     -- TxRAM enable
       USB_TxRAM_W_N:            out std_logic;                     -- TxRAM write
       USB_TxRAM_G_N:            out std_logic;                     -- TxRAM read
       USB_TxRAM_A:              out std_logic_vector(6 downto 0);  -- TxRAM address 
       USB_TxRAM_DQ_In:          in  std_logic_vector(31 downto 0); -- TxRAM out data
       USB_TxRAM_DQ_Out:         out std_logic_vector(31 downto 0); -- TxRAM in data

       -- Suspend 
       USB_Suspend:              out std_logic;                     -- Suspend

       -- Interface to VPB Wrapper
       r_data:                   out std_logic_vector(31 downto 0);  -- read data
       gnt:                      out std_logic;                      -- grant
       clk:                      in  std_logic;                      -- clock
       pvci_reset_n:             in  std_logic;                      -- reset
       req:                      in  std_logic;                      -- request
       address:                  in  std_logic_vector(7 downto 0);   -- address
       rnw:                      in  std_logic;                      -- read/write
       w_data:                   in  std_logic_vector(31 downto 0);  -- write data
       error:                    out std_logic;                      -- error

       -- Interrupt request 
       USB_Int_Req_Irq:          out std_logic;                      -- IRQ interrupt
       USB_Int_Req_Fiq:          out std_logic;                      -- FIQ interrupt
                     

       -- Upstream port
       USB_UP_LED_N:             out std_logic;                      -- LED
       USB_UP_RxDM:               in std_logic;                      -- Rx D-
       USB_UP_RxDP:               in std_logic;                      -- Rx D+
       USB_UP_RxRCV:              in std_logic;                      -- Rx RCV
       USB_UP_TxDM:              out std_logic;                      -- Tx D-
       USB_UP_TxDP:              out std_logic;                      -- Tx D+
       USB_UP_TxEnable_N:        out std_logic                      -- Tx Enable

      ); 
end USBPVCI_DfT;