usb_new_tx_sf_dpdm_ent.vhdl

实现USB接口功能的VHDL和verilog完整源代码

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---- File >>> usb_new_tx_sf_dpdm_ent.vhdl 
---- Iden >>>							970529-14:36:04
----
---- Project:		USB Development
---- Customer:		Philips_ITCL
----
---- Module:		entity TX_SF_DPDM
---- Written by:	Usb User (e-mail: [e-mail])
----			Easics nv
----			Kapeldreef 60
----			B-3001	Leuven
----			Belgium
----			Tel [phone]
----			Fax [phone]
----			e-mail: [e-mail]
----
---- Creation Date:	Thu, 29 May 1997
----
---- Purpose:
----
---- Revision history:
----
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library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

library work;
use work.PCK_GENERAL.all;
use work.PCK_USB.all;
use work.PCK_CONFIGURATION.all;

entity TX_SF_DPDM is
  port  (

	  SIE_TxLogValue: in T_UsbLog_enum;

	  UP_DP:          out one_bit;
	  UP_DM:          out one_bit;

	  ConfigArray:    in S_ConfigArray
	);
end TX_SF_DPDM;