usb_new_usbpvci_dft_str.vhdl

实现USB接口功能的VHDL和verilog完整源代码

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--
--  P H I L I P S  C O M P A N Y  R E S T R I C T E D
--                                         
--  Copyright (c) 1998.                    
--
--  Philips Electronics N.V.
--
--  Philips Semiconductors
--  Interconnectivity and Processor Peripheral group
--  Bangalore,India
--  All rights reserved. Reproduction in whole or in part is prohibited
--  without the written permission of the copyright owner.
--
--------------------------------------------------------------------------------
--
--  File            : usb_new_usbpvci_dFt_str.vhdl 
--
--  Module          : USBPVCI_DfT
--
--  Project         : VPB bus Interface to USB 1.1 Device(USBFS22)
--
--  Author          :              
--
--  Description     : The architecture of USBPVCI_DfT block. It includes the 
--                    follwoing modules.
--                    USBPVCI, 
--                    usbapb_dft_3a, 
--                    usbapb_dft_3b,
--                    usbapb_dft_2b
--
--  Status          : 
--
--  Contact address : 
--
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library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

library work;
use work.all;

ARCHITECTURE str OF USBPVCI_DfT IS

  component USBPVCI
     port(
          -- Clocks
          USB_BitClk:            in  std_logic;                     -- Recovered bit clock
          USB_BitClk_Out:        out std_logic;                     -- Recovered bit clock
          USB_MainClk:           in  std_logic;                     -- Main clock
          USB_NeedClk:           out std_logic;                     -- USB Core needs clock

          -- Connect
          USB_Connect_N:         out std_logic;                     -- Controls switch for softconnect
          USB_VBus:              in  std_logic;                     -- Bus power is present

          -- Test mode signals
          USB_TestMode:          in  std_logic;                     -- Select test mode

	  -- USB asynchronous reset
	  USB_AsynReset_N:       in  std_logic;                     -- Reset going to asynch logic

          -- Raminterface

          USB_RxRAM_E_N:         out std_logic;                     -- RxRAM enable
          USB_RxRAM_W_N:         out std_logic;                     -- RxRAM write       
          USB_RxRAM_G_N:         out std_logic;                     -- RxRAM read
          USB_RxRAM_A:           out std_logic_vector(6 downto 0);  -- RxRAM address 
          USB_RxRAM_DQ_In:       in  std_logic_vector(31 downto 0); -- RxRAM out data
          USB_RxRAM_DQ_Out:      out std_logic_vector(31 downto 0); -- RxRAM in data
   
          USB_TxRAM_E_N:         out std_logic;                     -- TxRAM enable
          USB_TxRAM_W_N:         out std_logic;                     -- TxRAM write
          USB_TxRAM_G_N:         out std_logic;                     -- TxRAM read
          USB_TxRAM_A:           out std_logic_vector(6 downto 0);  -- TxRAM address 
          USB_TxRAM_DQ_In:       in  std_logic_vector(31 downto 0); -- TxRAM out data
          USB_TxRAM_DQ_Out:      out std_logic_vector(31 downto 0); -- TxRAM in data

          -- Suspend
          USB_Suspend:           out std_logic;                     -- Suspend

          -- PVCI interface
          r_data:                out std_logic_vector(31 downto 0); -- read data
          gnt:                   out std_logic;                     -- grant
          clk:                   in  std_logic;                     -- clock
          pvci_reset_n:          in  std_logic;                     -- reset
          req:                   in  std_logic;                     -- request
          address:               in  std_logic_vector(7 downto 0);  -- address
          rnw:                   in  std_logic;                     -- read/write
          w_data:                in  std_logic_vector(31 downto 0); -- write data
	  error:                 out std_logic;                     -- error

          -- Interrupt request    
          USB_Int_Req_Irq:       out std_logic;                     -- Irq interrupt to the system
          USB_Int_Req_Fiq:       out std_logic;                     -- Fiq interrupt to the system
                   
          -- Upstream port 
          USB_UP_LED_N:          out std_logic;                     -- LED
          USB_UP_RxDM:           in  std_logic;                     -- Rx D-
          USB_UP_RxDP:           in  std_logic;	                    -- Rx D+
          USB_UP_RxRCV:          in  std_logic;                     -- Rx RCV
          USB_UP_TxDM:           out std_logic;	                    -- Tx D-
          USB_UP_TxDP:           out std_logic;	                    -- Tx D+
          USB_UP_TxEnable_N:     out std_logic                      -- Tx Enable
         );
  end component;
  
 
-- Signals declaration
signal USB_Connect_N_i:          std_logic;
signal USB_Suspend_i:            std_logic;
signal USB_VBus_i:               std_logic;
signal USB_UP_RxDM_i:            std_logic;
signal USB_UP_TxEnable_N_i:      std_logic;
signal USB_UP_RxDP_i:            std_logic;
signal USB_UP_RxRCV_i:           std_logic;
signal USB_Int_Req_Irq_i:        std_logic;
signal USB_Int_Req_Fiq_i:        std_logic;
signal USB_UP_LED_N_i:           std_logic;
signal USB_UP_TxDP_i:            std_logic;
signal USB_UP_TxDM_i:            std_logic;
signal USB_Resetn:               std_logic;  --       ????

begin

USB_VBus_i        <= USB_VBus;
USB_UP_RxRCV_i    <= USB_UP_RxRCV;
USB_UP_RxDM_i     <= USB_UP_RxDM;
USB_UP_RxDP_i     <= USB_UP_RxDP;
USB_Int_Req_Irq   <= USB_Int_Req_Irq_i;
USB_Int_Req_Fiq   <= USB_Int_Req_Fiq_i;
USB_UP_LED_N      <= USB_UP_LED_N_i;
USB_UP_TxDP       <= USB_UP_TxDP_i;
USB_UP_TxDM       <= USB_UP_TxDM_i;
USB_suspend       <= USB_suspend_i;
USB_Connect_N     <= USB_Connect_N_i;
USB_UP_TxEnable_N <= USB_UP_TxEnable_N_i;
USB_Resetn        <=  USB_Test_Resetn when USB_TestMode = '1' else pvci_reset_n;


       
 USBPVCI_1 : USBPVCI
  PORT MAP(
           -- Clocks
           USB_BitClk            => USB_BitClk,
           USB_BitClk_Out        => USB_BitClk_Out,
           USB_MainClk           => USB_MainClk,
           USB_NeedClk           => USB_NeedClk,
       
           -- Connect
           USB_Connect_N         => USB_Connect_N_i,
           USB_VBus              => USB_VBus_i,
           
           -- Test mode signals
           USB_TestMode          =>  USB_TestMode,
	   
	   -- USB asynchronous reset
	   USB_AsynReset_N       => USB_Resetn,
           
           -- Raminterface
           USB_RxRAM_E_N         => USB_RxRAM_E_N,
           USB_RxRAM_W_N         => USB_RxRAM_W_N,         
           USB_RxRAM_G_N         => USB_RxRAM_G_N,
           USB_RxRAM_A           => USB_RxRAM_A,
           USB_RxRAM_DQ_In       => USB_RxRAM_DQ_In,
           USB_RxRAM_DQ_Out      => USB_RxRAM_DQ_Out, 
           USB_TxRAM_E_N         => USB_TxRAM_E_N,
           USB_TxRAM_W_N         => USB_TxRAM_W_N,
           USB_TxRAM_G_N         => USB_TxRAM_G_N,
           USB_TxRAM_A           => USB_TxRAM_A,
           USB_TxRAM_DQ_In       => USB_TxRAM_DQ_In ,
           USB_TxRAM_DQ_Out      => USB_TxRAM_DQ_Out,
           
           -- Suspend
           USB_Suspend           => USB_Suspend_i,
 
           -- pvci interface
           r_data                => r_data,
           gnt                   => gnt,
           clk                   => clk ,
           pvci_reset_n          => pvci_reset_n,
           req                   => req,
           address               => address,
           rnw                   => rnw,
           w_data                => w_data,
	   error                 => error,
          
           -- Interrupt request to system
           USB_Int_Req_Irq       => USB_Int_Req_Irq_i,
           USB_Int_Req_Fiq       => USB_Int_Req_Fiq_i, 

           -- Upstream port
           USB_UP_LED_N          => USB_UP_LED_N_i,
           USB_UP_RxDM           => USB_UP_RxDM_i,
           USB_UP_RxDP           => USB_UP_RxDP_i,
           USB_UP_RxRCV          => USB_UP_RxRCV_i,
           USB_UP_TxDM           => USB_UP_TxDM_i,
           USB_UP_TxDP           => USB_UP_TxDP_i,
           USB_UP_TxEnable_N     => USB_UP_TxEnable_N_i
          );  
              
end str;