usiedcddef.v

实现USB接口功能的VHDL和verilog完整源代码

/******************************************
	Filename: 	siedcddef.v 1.4
******************************************/

// decoded state machine deinitions for dcd states

parameter [3:0] 
	DCDIDLE =	4'b0000,
	DCDSYNC =	4'b0001,
	DCDPID =	4'b0010,
	DCDSOF =	4'b0011,
	DCDADDR =	4'b0100,
	DCDENDP =	4'b0101,
	DCDDATA =	4'b0110,
	DCDCRC5 =	4'b0111,
	DCDERROR =	4'b1000,
	DCDEOP =	4'b1001;

/*
parameter [9:0]
  DCDIDLE   = 10'b0000000001,
  DCDSYNC   = 10'b0000000010,
  DCDPID    = 10'b0000000100,
  DCDSOF    = 10'b0000001000,
  DCDADDR   = 10'b0000010000,
  DCDENDP   = 10'b0000100000,
  DCDDATA   = 10'b0001000000,
  DCDCRC5   = 10'b0010000000,
  DCDERROR  = 10'b0100000000,
  DCDEOP    = 10'b1000000000
    ;
*/