map.mrp

verilog源码

Xilinx Mapping Report File for Design 'calculat'
Copyright (c) 1995-2000 Xilinx, Inc.  All rights reserved.

Design Information
------------------
Command Line   : map -p xc2s50-5-pq208 -o map.ncd calculat.ngd calculat.pcf 
Target Device  : x2s50
Target Package : pq208
Target Speed   : -5
Mapper Version : spartan2 -- D.19
Mapped Date    : Thu Oct 12 16:08:51 2006

Design Summary
--------------
   Number of errors:      0
   Number of warnings:    7
   Number of Slices:                 70 out of    768    9%
   Number of Slices containing
      unrelated logic:                0 out of     70    0%
   Total Number Slice Registers:     90 out of  1,536    5%
      Number used as Flip Flops:                   76
      Number used as Latches:                      14
   Number of 4 input LUTs:          101 out of  1,536    6%
   Number of bonded IOBs:            24 out of    140   17%
   Number of GCLKIOBs:                1 out of      4   25%
Total equivalent gate count for design:  1,293
Additional JTAG gate count for IOBs:  1,200

Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Design Attributes
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - Added Logic
Section 7 - Expanded Logic
Section 8 - Signal Cross-Reference
Section 9 - Symbol Cross-Reference
Section 10 - IOB Properties
Section 11 - RPMs
Section 12 - Guide Report
Section 13 - Area Group Summary

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------
WARNING:MapLib:149 - Failed to find a MUXCY that associates with XORCY symbol
   "U7/C188" (output signal=U7/C99/N18). Cannot recognize the standard carry
   chain structure.
WARNING:MapLib:149 - Failed to find a MUXCY that associates with XORCY symbol
   "U7/C202" (output signal=U7/syn1488). Cannot recognize the standard carry
   chain structure.
WARNING:MapLib:149 - Failed to find a MUXCY that associates with XORCY symbol
   "U7/C212" (output signal=U7/syn1482). Cannot recognize the standard carry
   chain structure.
WARNING:MapLib:62 - All of the external outputs in this design are using slew
   rate limited output drivers. The delay on speed critical outputs can be
   dramatically reduced by designating them as fast outputs in the schematic.
WARNING:MapLib:277 - Dedicated Clock IO IBUFG symbol "$I211" (output
   signal=$Net00008_) is not driving a global clock buffer or a DLL. This
   configuration will result in high clock skew and long net delay.
WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net U10/N14 is sourced
   by a combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.
WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net U9/N14 is sourced by
   a combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.

Section 3 - Design Attributes
-----------------------------
 Attribute LOC
   "p125" on symbol "$I147"
   "p127" on symbol "$I149"
   "p129" on symbol "$I151"
   "p132" on symbol "$I153"
   "p90" on symbol "$I157"
   "p123" for signal(s) $Net00024_ on symbol "$I159"
   "p122" for signal(s) $Net00005_ on symbol "$I161"
   "p121" for signal(s) $Net00006_ on symbol "$I163"
   "p120" for signal(s) $Net00007_ on symbol "$I165"
   "p110" for signal(s) CARRY on symbol "$I179"
   "p15" for signal(s) $Net00066_ on symbol "$I181"
   "p14" for signal(s) $Net00009_ on symbol "$I183"
   "p17" for signal(s) $Net00010_ on symbol "$I185"
   "p16" for signal(s) $Net00011_ on symbol "$I187"
   "p20" for signal(s) $Net00012_ on symbol "$I189"
   "p18" for signal(s) $Net00013_ on symbol "$I191"
   "p22" for signal(s) $Net00068_ on symbol "$I193"
   "p24" for signal(s) $Net00070_ on symbol "$I195"
   "p23" for signal(s) $Net00072_ on symbol "$I197"
   "p29" for signal(s) $Net00074_ on symbol "$I199"
   "p27" for signal(s) $Net00076_ on symbol "$I201"
   "p31" for signal(s) $Net00078_ on symbol "$I203"
   "p30" for signal(s) $Net00081_ on symbol "$I205"
   "p34" for signal(s) $Net00083_ on symbol "$I207"
   "p80" on symbol "$I209"
 Attribute BLKNM
   "BLK0_2" for signal(s) U7/C99/N18 on symbol "U7/C188"
   "BLK0_2" for signal(s) U7/syn1611 on symbol "U7/C189"
   "BLK1_2" for signal(s) U7/syn1488 on symbol "U7/C202"
   "BLK1_2" for signal(s) U7/syn1609 on symbol "U7/C203"
   "BLK2_2" for signal(s) U7/syn1482 on symbol "U7/C212"
   "BLK2_2" for signal(s) U7/syn1607 on symbol "U7/C213"

Section 4 - Removed Logic Summary
---------------------------------
   5 block(s) optimized away

Section 5 - Removed Logic
-------------------------

Optimized Block(s):
TYPE 		BLOCK
GND 		U11/C304
FDC 		U11/divide21/counter_reg<1>
VCC 		U4/C536
GND 		U4/C537
VCC 		U7/C220

To enable printing of redundant blocks removed and signals merged, set the
detailed map report option and rerun map.

Section 6 - Added Logic
-----------------------

Section 7 - Expanded Logic
--------------------------
To enable this section, set the detailed map report option and rerun map.

Section 8 - Signal Cross-Reference
----------------------------------
To enable this section, set the detailed map report option and rerun map.

Section 9 - Symbol Cross-Reference
----------------------------------
To enable this section, set the detailed map report option and rerun map.

Section 10 - IOB Properties
---------------------------
10M (GCLKIOB)
$Net00005_ (IOB) : SLEW=SLOW DRIVE=12
$Net00006_ (IOB) : SLEW=SLOW DRIVE=12
$Net00007_ (IOB) : SLEW=SLOW DRIVE=12
$Net00009_ (IOB) : SLEW=SLOW DRIVE=12
$Net00010_ (IOB) : SLEW=SLOW DRIVE=12
$Net00011_ (IOB) : SLEW=SLOW DRIVE=12
$Net00012_ (IOB) : SLEW=SLOW DRIVE=12
$Net00013_ (IOB) : SLEW=SLOW DRIVE=12
$Net00024_ (IOB) : SLEW=SLOW DRIVE=12
$Net00066_ (IOB) : SLEW=SLOW DRIVE=12
$Net00068_ (IOB) : SLEW=SLOW DRIVE=12
$Net00070_ (IOB) : SLEW=SLOW DRIVE=12
$Net00072_ (IOB) : SLEW=SLOW DRIVE=12
$Net00074_ (IOB) : SLEW=SLOW DRIVE=12
$Net00076_ (IOB) : SLEW=SLOW DRIVE=12
$Net00078_ (IOB) : SLEW=SLOW DRIVE=12
$Net00081_ (IOB) : SLEW=SLOW DRIVE=12
$Net00083_ (IOB) : SLEW=SLOW DRIVE=12
C1 (IOB)
C2 (IOB)
C3 (IOB)
C4 (IOB)
CARRY (IOB) : SLEW=SLOW DRIVE=12
RESET (IOB)

Section 11 - RPMs
-----------------

Section 12 - Guide Report
-------------------------
Guide not run on this design.

Section 13 - Area Group Summary
-------------------------------
No area groups were found in this design.