time_sim.edn

verilog源码

(edif time_sim
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timestamp 2006 10 12 16 8 57)
      (program "Xilinx NGD2EDIF" (version "D.19"))
      (comment "Command line: -w -v fndtn calculat.nga time_sim.edn ")))
  (external SIMPRIMS
    (edifLevel 0)
    (technology (numberDefinition
      (scale 1 (E 1 -12) (unit TIME))))
    (cell x_latch
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN
            (direction INPUT))
          (port CLK
            (direction INPUT))
          (port SET
            (direction INPUT))
          (port RST
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_lut4
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port ADR0
            (direction INPUT))
          (port ADR1
            (direction INPUT))
          (port ADR2
            (direction INPUT))
          (port ADR3
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_lut3
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port ADR0
            (direction INPUT))
          (port ADR1
            (direction INPUT))
          (port ADR2
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_inv
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_ff
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN
            (direction INPUT))
          (port CLK
            (direction INPUT))
          (port CE
            (direction INPUT))
          (port SET
            (direction INPUT))
          (port RST
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_lut2
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port ADR0
            (direction INPUT))
          (port ADR1
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_zero
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_or2
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN0
            (direction INPUT))
          (port IN1
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_xor2
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN0
            (direction INPUT))
          (port IN1
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_ipad
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port PAD
            (direction INPUT))
      )))
    (cell x_buf
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_opad
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port PAD
            (direction OUTPUT))
      )))
    (cell x_ckbuf
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
      )))
    (cell x_tri
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port IN
            (direction INPUT))
          (port OUT
            (direction OUTPUT))
          (port CTL
            (direction INPUT))
      )))
    (cell x_one
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port OUT
            (direction OUTPUT))
      )))
  )
  (library calculat_lib
    (edifLevel 0)
    (technology (numberDefinition
      (scale 1 (E 1 -12) (unit TIME))))
    (cell U10
      (cellType GENERIC)
      (view view_1
        (viewType NETLIST)
        (interface
          (port (rename IN_3_ "IN<3>")
            (direction INPUT)
            )
          (port (rename IN_2_ "IN<2>")
            (direction INPUT)
            )
          (port (rename IN_1_ "IN<1>")
            (direction INPUT)
            )
          (port (rename IN_0_ "IN<0>")
            (direction INPUT)
            )
          (port G
            (direction OUTPUT)
            )
          (port F
            (direction OUTPUT)
            )
          (port E
            (direction OUTPUT)
            )
          (port D
            (direction OUTPUT)
            )
          (port C
            (direction OUTPUT)
            )
          (port B
            (direction OUTPUT)
            )
          (port A
            (direction OUTPUT)
            )
          (port GSR
            (direction INPUT)
            )
        )
        (contents
          (instance (rename out_reg_0_ "out_reg<0>")
            (viewRef view_1 (cellRef x_latch (libraryRef SIMPRIMS)))
            (property PWCLKLO (integer 1806)(unit TIME) (owner "Xilinx"))
            (property PWCLKHI (integer 1806)(unit TIME) (owner "Xilinx"))
            (property RISECLK (integer 904)(unit TIME) (owner "Xilinx"))
            (property SUINHICLK (integer 478)(unit TIME) (owner "Xilinx"))
            (property HOLDINLOCLK (integer 1)(unit TIME) (owner "Xilinx"))
            (property SUINLOCLK (integer 478)(unit TIME) (owner "Xilinx"))
            (property HOLDINHICLK (integer 1)(unit TIME) (owner "Xilinx"))
            (portInstance IN
            )
            (portInstance CLK
              (property FALL (integer 755)(unit TIME) (owner "Xilinx"))
              (property RISE (integer 755)(unit TIME) (owner "Xilinx"))
            )
            (portInstance RST
              (property RISE (integer 11173)(unit TIME) (owner "Xilinx"))
              (property FALL (integer 11173)(unit TIME) (owner "Xilinx"))
            )
            (portInstance OUT
              (property RISE (integer 507)(unit TIME) (owner "Xilinx"))
              (property FALL (integer 507)(unit TIME) (owner "Xilinx"))
            )
          )
          (instance (rename out_reg_1_ "out_reg<1>")
            (viewRef view_1 (cellRef x_latch (libraryRef SIMPRIMS)))
            (property PWCLKLO (integer 1806)(unit TIME) (owner "Xilinx"))
            (property PWCLKHI (integer 1806)(unit TIME) (owner "Xilinx"))
            (property RISECLK (integer 904)(unit TIME) (owner "Xilinx"))
            (property SUINHICLK (integer 478)(unit TIME) (owner "Xilinx"))
            (property SUINLOCLK (integer 478)(unit TIME) (owner "Xilinx"))
            (property HOLDINLOCLK (integer 1)(unit TIME) (owner "Xilinx"))
            (property HOLDINHICLK (integer 1)(unit TIME) (owner "Xilinx"))
            (portInstance IN
            )
            (portInstance CLK
              (property FALL (integer 1086)(unit TIME) (owner "Xilinx"))
              (property RISE (integer 1086)(unit TIME) (owner "Xilinx"))
            )
            (portInstance RST
              (property RISE (integer 11173)(unit TIME) (owner "Xilinx"))
              (property FALL (integer 11173)(unit TIME) (owner "Xilinx"))
            )
            (portInstance OUT
              (property RISE (integer 507)(unit TIME) (owner "Xilinx"))
              (property FALL (integer 507)(unit TIME) (owner "Xilinx"))
            )
          )
          (instance (rename out_reg_2_ "out_reg<2>")
            (viewRef view_1 (cellRef x_latch (libraryRef SIMPRIMS)))
            (property PWCLKLO (integer 1806)(unit TIME) (owner "Xilinx"))
            (property PWCLKHI (integer 1806)(unit TIME) (owner "Xilinx"))
            (property RISECLK (integer 904)(unit TIME) (owner "Xilinx"))
            (property HOLDINHICLK (integer 1)(unit TIME) (owner "Xilinx"))
            (property SUINHICLK (integer 478)(unit TIME) (owner "Xilinx"))
            (property HOLDINLOCLK (integer 1)(unit TIME) (owner "Xilinx"))
            (property SUINLOCLK (integer 478)(unit TIME) (owner "Xilinx"))
            (portInstance IN
            )