agc.fit.rpt

AGC verilog实现

Fitter report for agc
Thu Dec 01 22:18:55 2011
Quartus II Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Fitter Summary
  3. Fitter Settings
  4. Parallel Compilation
  5. I/O Assignment Warnings
  6. Incremental Compilation Preservation Summary
  7. Incremental Compilation Partition Settings
  8. Incremental Compilation Placement Preservation
  9. Pin-Out File
 10. Fitter Resource Usage Summary
 11. Fitter Partition Statistics
 12. Input Pins
 13. Output Pins
 14. Dual Purpose and Dedicated Pins
 15. I/O Bank Usage
 16. All Package Pins
 17. Output Pin Default Load For Reported TCO
 18. Fitter Resource Utilization by Entity
 19. Delay Chain Summary
 20. Pad To Core Delay Chain Fanout
 21. Control Signals
 22. Global & Other Fast Signals
 23. Non-Global High Fan-Out Signals
 24. Interconnect Usage Summary
 25. LAB Logic Elements
 26. LAB Signals Sourced
 27. LAB Signals Sourced Out
 28. LAB Distinct Inputs
 29. I/O Rules Summary
 30. I/O Rules Details
 31. I/O Rules Matrix
 32. Fitter Device Options
 33. Operating Settings and Conditions
 34. Estimated Delay Added for Hold Timing Summary
 35. Estimated Delay Added for Hold Timing Details
 36. Fitter Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-------------------------------------------------------------------------------+
; Fitter Summary                                                                ;
+-------------------------------+-----------------------------------------------+
; Fitter Status                 ; Successful - Thu Dec 01 22:18:55 2011         ;
; Quartus II Version            ; 10.0 Build 262 08/18/2010 SP 1 SJ Web Edition ;
; Revision Name                 ; agc                                           ;
; Top-level Entity Name         ; agc                                           ;
; Family                        ; Stratix III                                   ;
; Device                        ; EP3SE50F484C2                                 ;
; Timing Models                 ; Final                                         ;
; Logic utilization             ; < 1 %                                         ;
;     Combinational ALUTs       ; 144 / 38,000 ( < 1 % )                        ;
;     Memory ALUTs              ; 0 / 19,000 ( 0 % )                            ;
;     Dedicated logic registers ; 0 / 38,000 ( 0 % )                            ;
; Total registers               ; 0                                             ;
; Total pins                    ; 71 / 296 ( 24 % )                             ;
; Total virtual pins            ; 0                                             ;
; Total block memory bits       ; 0 / 5,455,872 ( 0 % )                         ;
; DSP block 18-bit elements     ; 0 / 384 ( 0 % )                               ;
; Total PLLs                    ; 0 / 4 ( 0 % )                                 ;
; Total DLLs                    ; 0 / 4 ( 0 % )                                 ;
+-------------------------------+-----------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Settings                                                                                                                                                                                ;
+----------------------------------------------------------------------------+---------------------------------------------------------+---------------------------------------------------------+
; Option                                                                     ; Setting                                                 ; Default Value                                           ;
+----------------------------------------------------------------------------+---------------------------------------------------------+---------------------------------------------------------+
; Device                                                                     ; EP3SE50F484C2                                           ;                                                         ;
; Nominal Core Supply Voltage                                                ; 1.1V                                                    ;                                                         ;
; Minimum Core Junction Temperature                                          ; 0                                                       ;                                                         ;
; Maximum Core Junction Temperature                                          ; 85                                                      ;                                                         ;
; Fit Attempts to Skip                                                       ; 0                                                       ; 0.0                                                     ;
; Use smart compilation                                                      ; Off                                                     ; Off                                                     ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On                                                      ; On                                                      ;
; Enable compact report table                                                ; Off                                                     ; Off                                                     ;
; Use TimeQuest Timing Analyzer                                              ; On                                                      ; On                                                      ;
; Router Timing Optimization Level                                           ; Normal                                                  ; Normal                                                  ;
; Placement Effort Multiplier                                                ; 1.0                                                     ; 1.0                                                     ;
; Router Effort Multiplier                                                   ; 1.0                                                     ; 1.0                                                     ;