agc.sta.qmsg

AGC verilog实现

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II " "Info: Running Quartus II TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition " "Info: Version 10.0 Build 262 08/18/2010 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Thu Dec 01 22:19:03 2011 " "Info: Processing started: Thu Dec 01 22:19:03 2011" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta agc -c agc " "Info: Command: quartus_sta agc -c agc" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: qsta_default_script.tcl version: #1" {  } {  } 0 0 "qsta_default_script.tcl version: #1" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Core supply voltage 1.1V " "Info: Core supply voltage is 1.1V" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[2\]\|combout " "Warning: Node \"x_power\[2\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[1\]\|combout " "Warning: Node \"x_power\[1\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[2\]\|combout " "Warning: Node \"x_power1\[2\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[1\]\|combout " "Warning: Node \"x_power1\[1\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[4\]\|combout " "Warning: Node \"x_power\[4\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[5\]\|combout " "Warning: Node \"x_power\[5\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[3\]\|combout " "Warning: Node \"x_power\[3\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[7\]\|combout " "Warning: Node \"x_power\[7\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[6\]\|combout " "Warning: Node \"x_power\[6\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[4\]\|combout " "Warning: Node \"x_power1\[4\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[5\]\|combout " "Warning: Node \"x_power1\[5\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[3\]\|combout " "Warning: Node \"x_power1\[3\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[7\]\|combout " "Warning: Node \"x_power1\[7\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[6\]\|combout " "Warning: Node \"x_power1\[6\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[12\]\|combout " "Warning: Node \"x_power\[12\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[15\]\|combout " "Warning: Node \"x_power\[15\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[14\]\|combout " "Warning: Node \"x_power\[14\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[13\]\|combout " "Warning: Node \"x_power\[13\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[11\]\|combout " "Warning: Node \"x_power\[11\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[12\]\|combout " "Warning: Node \"x_power1\[12\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[15\]\|combout " "Warning: Node \"x_power1\[15\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[14\]\|combout " "Warning: Node \"x_power1\[14\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[13\]\|combout " "Warning: Node \"x_power1\[13\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[11\]\|combout " "Warning: Node \"x_power1\[11\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[10\]\|combout " "Warning: Node \"x_power\[10\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[9\]\|combout " "Warning: Node \"x_power\[9\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[8\]\|combout " "Warning: Node \"x_power\[8\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[10\]\|combout " "Warning: Node \"x_power1\[10\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[9\]\|combout " "Warning: Node \"x_power1\[9\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[8\]\|combout " "Warning: Node \"x_power1\[8\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[30\]\|combout " "Warning: Node \"x_power\[30\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[29\]\|combout " "Warning: Node \"x_power\[29\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[28\]\|combout " "Warning: Node \"x_power\[28\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[31\]\|combout " "Warning: Node \"x_power\[31\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[32\]\|combout " "Warning: Node \"x_power\[32\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[30\]\|combout " "Warning: Node \"x_power1\[30\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[29\]\|combout " "Warning: Node \"x_power1\[29\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[28\]\|combout " "Warning: Node \"x_power1\[28\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[31\]\|combout " "Warning: Node \"x_power1\[31\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[32\]\|combout " "Warning: Node \"x_power1\[32\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[20\]\|combout " "Warning: Node \"x_power\[20\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[17\]\|combout " "Warning: Node \"x_power\[17\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[18\]\|combout " "Warning: Node \"x_power\[18\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[16\]\|combout " "Warning: Node \"x_power\[16\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[19\]\|combout " "Warning: Node \"x_power\[19\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[20\]\|combout " "Warning: Node \"x_power1\[20\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[17\]\|combout " "Warning: Node \"x_power1\[17\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[18\]\|combout " "Warning: Node \"x_power1\[18\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[16\]\|combout " "Warning: Node \"x_power1\[16\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[19\]\|combout " "Warning: Node \"x_power1\[19\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[23\]\|combout " "Warning: Node \"x_power\[23\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[25\]\|combout " "Warning: Node \"x_power\[25\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[26\]\|combout " "Warning: Node \"x_power\[26\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[24\]\|combout " "Warning: Node \"x_power\[24\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[22\]\|combout " "Warning: Node \"x_power\[22\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[23\]\|combout " "Warning: Node \"x_power1\[23\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[25\]\|combout " "Warning: Node \"x_power1\[25\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[26\]\|combout " "Warning: Node \"x_power1\[26\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[24\]\|combout " "Warning: Node \"x_power1\[24\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[22\]\|combout " "Warning: Node \"x_power1\[22\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[33\]\|combout " "Warning: Node \"x_power\[33\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[21\]\|combout " "Warning: Node \"x_power\[21\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[27\]\|combout " "Warning: Node \"x_power\[27\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[33\]\|combout " "Warning: Node \"x_power1\[33\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[21\]\|combout " "Warning: Node \"x_power1\[21\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[27\]\|combout " "Warning: Node \"x_power1\[27\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[34\]\|combout " "Warning: Node \"x_power\[34\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[36\]\|combout " "Warning: Node \"x_power\[36\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[35\]\|combout " "Warning: Node \"x_power\[35\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[34\]\|combout " "Warning: Node \"x_power1\[34\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[36\]\|combout " "Warning: Node \"x_power1\[36\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[35\]\|combout " "Warning: Node \"x_power1\[35\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power1\[0\]\|combout " "Warning: Node \"x_power1\[0\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1} { "Warning" "WTDB_COMB_LATCH_NODE" "x_power\[0\]\|combout " "Warning: Node \"x_power\[0\]\|combout\" is a latch" {  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 12 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0 -1}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "agc.sdc " "Critical Warning: Synopsys Design Constraints File file not found: 'agc.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 0 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "" 0 -1}
{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "Info: No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" {  } {  } 0 0 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Info: Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name rst rst " "Info: create_clock -period 1.000 -name rst rst" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Warning" "WSTA_SCC_LOOP" "4 " "Warning: Found combinational loop of 4 nodes" { { "Warning" "WSTA_SCC_NODE" "Add0~18\|datab " "Warning: Node \"Add0~18\|datab\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "Add0~18\|sumout " "Warning: Node \"Add0~18\|sumout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "cnt\[5\]~6\|datac " "Warning: Node \"cnt\[5\]~6\|datac\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "cnt\[5\]~6\|combout " "Warning: Node \"cnt\[5\]~6\|combout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 19 -1 0 } } { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 9 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 -1}
{ "Warning" "WSTA_SCC_LOOP" "2 " "Warning: Found combinational loop of 2 nodes" { { "Warning" "WSTA_SCC_NODE" "Add0~14\|datad " "Warning: Node \"Add0~14\|datad\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "Add0~14\|sumout " "Warning: Node \"Add0~14\|sumout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 19 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 -1}
{ "Warning" "WSTA_SCC_LOOP" "2 " "Warning: Found combinational loop of 2 nodes" { { "Warning" "WSTA_SCC_NODE" "Add0~10\|dataf " "Warning: Node \"Add0~10\|dataf\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1} { "Warning" "WSTA_SCC_NODE" "Add0~10\|sumout " "Warning: Node \"Add0~10\|sumout\"" {  } {  } 0 0 "Node \"%1!s!\"" 0 0 "" 0 -1}  } { { "agc.v" "" { Text "E:/altera/wiretx/agc/agc.v" 19 -1 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0 -1}