⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 hdl.var.txt

📁 用verilog 描写 应用于数字图像压缩系统--jpeg 有测试文档
💻 TXT
字号:
#*****************************************************************************
# NCSIM hdl.var template                                                     *
#*****************************************************************************

#This file allows commonly used tool setups to be invoked automatically.
#All the switches may be alternatively specifed on the command line.

#reference the tool installation hdl.var - DO NOT REMOVE

INCLUDE $CDS_INST_DIR/tools/inca/files/hdl.var

# These are default settings for NCVLOG, NCVHDL, NCELAB, NCSIM
# See below for commonly used switches.

DEFINE NCVLOGOPTS -NOCOPYRIGHT -UPDATE
DEFINE NCVHDLOPTS -NOCOPYRIGHT -UPDATE
DEFINE NCELABOPTS -NOCOPYRIGHT 
DEFINE NCSIMOPTS  -NOCOPYRIGHT -NOKEY -STATUS

#Maps the work library to a logical library. 
#This library will contain the compiled design units
#Can be overriden on the command line with -work <library>
DEFINE WORK work

# Define valid Verilog file extensions
DEFINE VERILOG_SUFFIX (.v, .vr, .vb, .vg)
 
# Define valid VHDL file extensions
DEFINE VHDL_SUFFIX (.vhd, .vhdl)

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -