wan_m16.vhd

来自「此为一用VHDL编写的硬件游戏程序」· VHDL 代码 · 共 28 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity wan_m16 is
port(clk :in std_logic;
     reset : in std_logic;
     en  :in std_logic;
     q  :buffer std_logic_vector(3 downto 0));
end wan_m16;
architecture behave of wan_m16 is
begin
  process(clk,reset)
  begin
     if(reset='0')then
        q<=(others=>'0');
      elsif(rising_edge(clk))then
       if(en='1')then
         q<=q+1;
        else q<=q;
       end if;
     end if;
  end process;
end behave ;