piso.fit.qmsg

FPGA数字移相器,编程环境为QUIRTE2,编程语言采用硬件描述语言vhdl

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 181 06/29/2004 SJ Full Version " "Info: Version 4.1 Build 181 06/29/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Aug 28 21:18:28 2005 " "Info: Processing started: Sun Aug 28 21:18:28 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --import_settings_files=off --export_settings_files=off piso -c piso " "Info: Command: quartus_fit --import_settings_files=off --export_settings_files=off piso -c piso" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "piso EP1C3T144C8 " "Info: Selected device EP1C3T144C8 for design piso" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation -- Fitter effort may be decreased to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6T144C8 " "Info: Device EP1C6T144C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "21 34 " "Info: No exact pin location assignment(s) for 21 pins of 34 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[8\] " "Info: Pin st\[8\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[8\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[8] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[8] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[7\] " "Info: Pin st\[7\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[7\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[7] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[6\] " "Info: Pin st\[6\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[6\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[6] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[5\] " "Info: Pin st\[5\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[5\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[5] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[4\] " "Info: Pin st\[4\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[4\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[4] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[3\] " "Info: Pin st\[3\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[3\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[3] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[2\] " "Info: Pin st\[2\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[2\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[2] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[1\] " "Info: Pin st\[1\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[1\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[1] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "st\[0\] " "Info: Pin st\[0\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 10 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "st\[0\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { st[0] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { st[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[7\] " "Info: Pin pout\[7\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[7\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[7] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[7] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[6\] " "Info: Pin pout\[6\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[6\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[6] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[5\] " "Info: Pin pout\[5\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[5\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[5] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[4\] " "Info: Pin pout\[4\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[4\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[4] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[3\] " "Info: Pin pout\[3\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[3\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[3] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[2\] " "Info: Pin pout\[2\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[2\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[2] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[1\] " "Info: Pin pout\[1\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[1\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[1] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[0\] " "Info: Pin pout\[0\] not assigned to an exact location on the device" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 11 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "pout\[0\]" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { pout[0] } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { pout[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tdo " "Info: Pin altera_reserved_tdo not assigned to an exact location on the device" {  } { { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tdo" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { altera_reserved_tdo } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { altera_reserved_tdo } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tms " "Info: Pin altera_reserved_tms not assigned to an exact location on the device" {  } { { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tms" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { altera_reserved_tms } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { altera_reserved_tms } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tck " "Info: Pin altera_reserved_tck not assigned to an exact location on the device" {  } { { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tck" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { altera_reserved_tck } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { altera_reserved_tck } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tdi " "Info: Pin altera_reserved_tdi not assigned to an exact location on the device" {  } { { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tdi" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { altera_reserved_tdi } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { altera_reserved_tdi } "NODE_NAME" } }  } 0}  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk Global clock in PIN 16 " "Info: Automatically promoted signal clk to use Global clock in PIN 16" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 8 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "sck Global clock in PIN 93 " "Info: Automatically promoted signal sck to use Global clock in PIN 93" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 8 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "altera_internal_jtag~TCKUTAP Global clock " "Info: Automatically promoted signal altera_internal_jtag~TCKUTAP to use Global clock" {  } { { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TDO" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "pf:s1\|flag Global clock " "Info: Automatically promoted some destinations of signal pf:s1\|flag to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "f " "Info: Destination f may be non-global or may not use global clock" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 6 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "pf:s1\|flag " "Info: Destination pf:s1\|flag may be non-global or may not use global clock" {  } { { "G:/EDA/piso/pf.vhd" "" "" { Text "G:/EDA/piso/pf.vhd" 29 -1 0 } }  } 0}  } { { "G:/EDA/piso/pf.vhd" "" "" { Text "G:/EDA/piso/pf.vhd" 29 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "load Global clock " "Info: Automatically promoted some destinations of signal load to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[15\]~35 " "Info: Destination piso:s2\|po\[15\]~35 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[30\]~32 " "Info: Destination piso:s2\|po\[30\]~32 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[29\]~33 " "Info: Destination piso:s2\|po\[29\]~33 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[28\]~34 " "Info: Destination piso:s2\|po\[28\]~34 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[31\]~51 " "Info: Destination piso:s2\|po\[31\]~51 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[14\]~36 " "Info: Destination piso:s2\|po\[14\]~36 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[13\]~37 " "Info: Destination piso:s2\|po\[13\]~37 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[12\]~38 " "Info: Destination piso:s2\|po\[12\]~38 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[11\]~39 " "Info: Destination piso:s2\|po\[11\]~39 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "piso:s2\|po\[10\]~40 " "Info: Destination piso:s2\|po\[10\]~40 may be non-global or may not use global clock" {  } { { "F:/EDA/piso/piso.vhd" "" "" { Text "F:/EDA/piso/piso.vhd" 7 -1 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0}  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 9 -1 0 } }  } 0}
{ "Info" "IFYGR_FYGR_PIN_USES_INTERNAL_GLOBAL" "load " "Info: Pin load drives global clock, but is not placed in a dedicated clock pin position" {  } { { "G:/EDA/piso/top.vhd" "" "" { Text "G:/EDA/piso/top.vhd" 9 -1 0 } } { "e:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "e:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "load" } } } } { "G:/EDA/piso/db/piso_cmp.qrpt" "" "" { Report "G:/EDA/piso/db/piso_cmp.qrpt" Compiler "piso" "UNKNOWN" "V1" "G:/EDA/piso/db/piso.quartus_db" { Floorplan "" "" "" { load } "NODE_NAME" } } } { "G:/EDA/piso/piso.fld" "" "" { Floorplan "G:/EDA/piso/piso.fld" "" "" { load } "NODE_NAME" } }  } 0}