📄 piso.sim.vwf

📁 FPGA数字移相器,编程环境为QUIRTE2,编程语言采用硬件描述语言vhdl
💻 VWF
📖 第 1 页 / 共 5 页
字号:
上一页 1 2 3 45
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 14400.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 16000.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 14400.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 16000.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 14400.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 16000.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4800.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 8000.0;
		LEVEL 1 FOR 3200.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 14400.0;
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 6400.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 1516.356;
	}
}

TRANSITION_LIST("load")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 65.0;
		LEVEL 0 FOR 3210.0;
		LEVEL 1 FOR 4996725.0;
	}
}

TRANSITION_LIST("sck")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 32;
			LEVEL 0 FOR 50.0;
			LEVEL 1 FOR 50.0;
		}
		LEVEL 0 FOR 4996800.0;
	}
}

TRANSITION_LIST("si")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 455.0;
		LEVEL 1 FOR 1600.0;
		LEVEL 0 FOR 4997945.0;
	}
}

TRANSITION_LIST("f")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3276784.206;
		NODE
		{
			REPEAT = 1077;
			LEVEL 1 FOR 800.0;
			LEVEL 0 FOR 800.0;
		}
		LEVEL 1 FOR 15.794;
	}
}

TRANSITION_LIST("st[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 5000000.0;
	}
}

TRANSITION_LIST("st[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 5000000.0;
	}
}

TRANSITION_LIST("st[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3379187.803;
		NODE
		{
			REPEAT = 10;
			LEVEL 1 FOR 59200.0;
			LEVEL 0 FOR 102400.0;
		}
		LEVEL 1 FOR 4812.197;
	}
}

TRANSITION_LIST("st[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3327988.71;
		NODE
		{
			REPEAT = 10;
			LEVEL 1 FOR 51200.0;
			LEVEL 0 FOR 51200.0;
			LEVEL 1 FOR 8000.0;
			LEVEL 0 FOR 51200.0;
		}
		LEVEL 1 FOR 51200.0;
		LEVEL 0 FOR 4811.29;
	}
}

TRANSITION_LIST("st[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3302389.132;
		NODE
		{
			REPEAT = 10;
			NODE
			{
				REPEAT = 2;
				LEVEL 1 FOR 25600.0;
				LEVEL 0 FOR 25600.0;
			}
			LEVEL 1 FOR 25600.0;
			LEVEL 0 FOR 33600.0;
		}
		LEVEL 1 FOR 25600.0;
		LEVEL 0 FOR 25600.0;
		LEVEL 1 FOR 25600.0;
		LEVEL 0 FOR 4810.868;
	}
}

TRANSITION_LIST("st[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3289588.571;
		NODE
		{
			REPEAT = 10;
			NODE
			{
				REPEAT = 5;
				LEVEL 1 FOR 12800.0;
				LEVEL 0 FOR 12800.0;
			}
			LEVEL 1 FOR 12800.0;
			LEVEL 0 FOR 20800.0;
		}
		NODE
		{
			REPEAT = 3;
			LEVEL 1 FOR 12800.0;
			LEVEL 0 FOR 12800.0;
		}
		LEVEL 1 FOR 12800.0;
		LEVEL 0 FOR 4811.429;
	}
}

TRANSITION_LIST("st[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3283189.029;
		NODE
		{
			REPEAT = 10;
			NODE
			{
				REPEAT = 11;
				LEVEL 1 FOR 6400.0;
				LEVEL 0 FOR 6400.0;
			}
			LEVEL 1 FOR 6400.0;
			LEVEL 0 FOR 14400.0;
		}
		NODE
		{
			REPEAT = 7;
			LEVEL 1 FOR 6400.0;
			LEVEL 0 FOR 6400.0;
		}
		LEVEL 1 FOR 6400.0;
		LEVEL 0 FOR 4810.971;
	}
}

TRANSITION_LIST("st[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3279988.551;
		NODE
		{
			REPEAT = 24;
			LEVEL 1 FOR 3200.0;
			LEVEL 0 FOR 3200.0;
		}
		NODE
		{
			REPEAT = 8;
			LEVEL 1 FOR 4800.0;
			NODE
			{
				REPEAT = 24;
				LEVEL 0 FOR 3200.0;
				LEVEL 1 FOR 3200.0;
			}
			LEVEL 0 FOR 3200.0;
		}
		LEVEL 1 FOR 4800.0;
		NODE
		{
			REPEAT = 24;
			LEVEL 0 FOR 3200.0;
			LEVEL 1 FOR 3200.0;
		}
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 4800.0;
		NODE
		{
			REPEAT = 16;
			LEVEL 0 FOR 3200.0;
			LEVEL 1 FOR 3200.0;
		}
		LEVEL 0 FOR 3200.0;
		LEVEL 1 FOR 1611.449;
	}
}

TRANSITION_LIST("st[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3278388.287;
		NODE
		{
			REPEAT = 49;
			LEVEL 1 FOR 1600.0;
			LEVEL 0 FOR 1600.0;
		}
		NODE
		{
			REPEAT = 8;
			LEVEL 1 FOR 3200.0;
			NODE
			{
				REPEAT = 49;
				LEVEL 0 FOR 1600.0;
				LEVEL 1 FOR 1600.0;
			}
			LEVEL 0 FOR 1600.0;
		}
		LEVEL 1 FOR 3200.0;
		NODE
		{
			REPEAT = 49;
			LEVEL 0 FOR 1600.0;
			LEVEL 1 FOR 1600.0;
		}
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 3200.0;
		NODE
		{
			REPEAT = 33;
			LEVEL 0 FOR 1600.0;
			LEVEL 1 FOR 1600.0;
		}
		LEVEL 0 FOR 1600.0;
		LEVEL 1 FOR 11.713;
	}
}

TRANSITION_LIST("altera_reserved_tdo")
{
	NODE
	{
		REPEAT = 1;
		LEVEL X FOR 5000000.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "clk";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "load";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "sck";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "si";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Hexadecimal;
	TREE_INDEX = 3;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "fout";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 4;
	TREE_LEVEL = 0;
	CHILDREN = 5, 6, 7, 8, 9, 10, 11, 12;
}

DISPLAY_LINE
{
	CHANNEL = "fout[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "fout[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 4;
}

DISPLAY_LINE
{
	CHANNEL = "st";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 13;
	TREE_LEVEL = 0;
	CHILDREN = 14, 15, 16, 17, 18, 19, 20, 21, 22;
}

DISPLAY_LINE
{
	CHANNEL = "st[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "st[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Unsigned;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 13;
}

DISPLAY_LINE
{
	CHANNEL = "f";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 23;
	TREE_LEVEL = 0;
}

DISPLAY_LINE
{
	CHANNEL = "altera_reserved_tdo";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 24;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 17600;
	MASTER = FALSE;
}

TIME_BAR
{
	TIME = 3190000;
	MASTER = TRUE;
}
;
上一页 1 2 3 45
💿 文件大小 803 K
👤 上传用户 wyly
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#QUIRTE #FPGA #vhdl #数字移相器
⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -