piso.tan.rpt

FPGA数字移相器,编程环境为QUIRTE2,编程语言采用硬件描述语言vhdl

+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                                                                                  ;
+-----------------------------------------+-----------------------------------------------------+------------------+--------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From             ; To                                                                                                                                   ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------+--------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 79.88 MHz ( period = 12.518 ns )                    ; add:s4|stand[3]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg3 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 80.32 MHz ( period = 12.450 ns )                    ; add:s4|stand[0]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg0 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 80.49 MHz ( period = 12.424 ns )                    ; add:s4|sinout[1] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg1 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 80.53 MHz ( period = 12.418 ns )                    ; add:s4|sinout[0] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg0 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 80.85 MHz ( period = 12.368 ns )                    ; add:s4|stand[6]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg6 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.16 MHz ( period = 11.606 ns )                    ; add:s4|stand[4]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg4 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.16 MHz ( period = 11.606 ns )                    ; add:s4|sinout[7] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg7 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.16 MHz ( period = 11.606 ns )                    ; add:s4|sinout[5] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg5 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.21 MHz ( period = 11.600 ns )                    ; add:s4|sinout[6] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg6 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.42 MHz ( period = 11.572 ns )                    ; add:s4|stand[1]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg1 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.49 MHz ( period = 11.562 ns )                    ; add:s4|sinout[4] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg4 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.49 MHz ( period = 11.562 ns )                    ; add:s4|sinout[3] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg3 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.49 MHz ( period = 11.562 ns )                    ; add:s4|sinout[2] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg2 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.54 MHz ( period = 11.556 ns )                    ; add:s4|stand[7]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg7 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.58 MHz ( period = 11.550 ns )                    ; add:s4|stand[8]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg8 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.58 MHz ( period = 11.550 ns )                    ; add:s4|stand[5]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg5 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.58 MHz ( period = 11.550 ns )                    ; add:s4|sinout[8] ; sin_rom:s3|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg8 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 86.91 MHz ( period = 11.506 ns )                    ; add:s4|stand[2]  ; sin_rom:s5|altsyncram:altsyncram_component|altsyncram_qjs:auto_generated|altsyncram_gaa2:altsyncram1|ram_block3a7~porta_address_reg2 ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 131.84 MHz ( period = 7.585 ns )                    ; add:s4|i[0]      ; add:s4|stand[6]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 133.05 MHz ( period = 7.516 ns )                    ; add:s4|i[29]     ; add:s4|stand[6]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 134.86 MHz ( period = 7.415 ns )                    ; add:s4|i[1]      ; add:s4|stand[6]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 136.05 MHz ( period = 7.350 ns )                    ; add:s4|i[30]     ; add:s4|stand[6]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 137.32 MHz ( period = 7.282 ns )                    ; add:s4|i[28]     ; add:s4|stand[6]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[8]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[7]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[5]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[4]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[2]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[1]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 139.65 MHz ( period = 7.161 ns )                    ; add:s4|i[0]      ; add:s4|stand[0]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 140.57 MHz ( period = 7.114 ns )                    ; add:s4|i[0]      ; add:s4|stand[3]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[8]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[7]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[5]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[4]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[2]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[1]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.00 MHz ( period = 7.092 ns )                    ; add:s4|i[29]     ; add:s4|stand[0]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 141.94 MHz ( period = 7.045 ns )                    ; add:s4|i[29]     ; add:s4|stand[3]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 143.04 MHz ( period = 6.991 ns )                    ; add:s4|i[1]      ; add:s4|stand[8]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 143.04 MHz ( period = 6.991 ns )                    ; add:s4|i[1]      ; add:s4|stand[7]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 143.04 MHz ( period = 6.991 ns )                    ; add:s4|i[1]      ; add:s4|stand[5]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 143.04 MHz ( period = 6.991 ns )                    ; add:s4|i[1]      ; add:s4|stand[4]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;
; N/A                                     ; 143.04 MHz ( period = 6.991 ns )                    ; add:s4|i[1]      ; add:s4|stand[2]                                                                                                                      ; clk        ; clk      ; None                        ; None                      ; None                    ;