📄 system_stm32f10x.lst
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###############################################################################
# #
# IAR ANSI C/C++ Compiler V6.10.2.52244/W32 for ARM 07/Aug/2011 12:10:43 #
# Copyright 1999-2010 IAR Systems AB. #
# #
# Cpu mode = thumb #
# Endian = little #
# Source file = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\CMSIS\CM #
# 3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c #
# Command line = F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\CMSIS\CM #
# 3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c -D #
# USE_STDPERIPH_DRIVER -D STM32F10X_CL -lCN #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\ -o F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Fla #
# sh\Obj\ --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little --cpu=Cortex-M3 #
# -e --fpu=None --dlib_config #
# D:\arm\INC\c\DLib_Config_Normal.h -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\APP\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ #
# -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP #
# \ST\CMSIS\CM3\CoreSupport\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \CMSIS\CM3\DeviceSupport\ST\STM32F10x\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\ST #
# \STM32F10x_StdPeriph_Driver\inc\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\BSP\uC #
# OS-II\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II #
# \..\..\uCOS-II\Ports\ARM-Cortex-M3\Generic\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uCO #
# S-II\Source\ -I F:\stm32\我的程序\Micrium\Software\EWARM #
# \OS-II\..\..\uC-LIB\ -I F:\stm32\我的程序\Micrium\Softwa #
# re\EWARM\OS-II\..\..\uC-LIB\Ports\ARM-Cortex-M3\IAR\ -I #
# F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\..\..\uC- #
# CPU\ -I F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\. #
# .\..\uC-CPU\ARM-Cortex-M3\IAR\ -On --use_c++_inline #
# List file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Lis #
# t\system_stm32f10x.lst #
# Object file = F:\stm32\我的程序\Micrium\Software\EWARM\OS-II\Flash\Obj #
# \system_stm32f10x.o #
# #
# #
###############################################################################
F:\stm32\我的程序\Micrium\Software\EWARM\BSP\ST\CMSIS\CM3\DeviceSupport\ST\STM32F10x\system_stm32f10x.c
1 /**
2 ******************************************************************************
3 * @file system_stm32f10x.c
4 * @author MCD Application Team
5 * @version V3.4.0
6 * @date 10/15/2010
7 * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
8 ******************************************************************************
9 *
10 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
11 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
12 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
13 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
14 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
15 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
16 *
17 * <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
18 ******************************************************************************
19 */
20
21 /** @addtogroup CMSIS
22 * @{
23 */
24
25 /** @addtogroup stm32f10x_system
26 * @{
27 */
28
29 /** @addtogroup STM32F10x_System_Private_Includes
30 * @{
31 */
32
33 #include "stm32f10x.h"
34
35 /**
36 * @}
37 */
38
39 /** @addtogroup STM32F10x_System_Private_TypesDefinitions
40 * @{
41 */
42
43 /**
44 * @}
45 */
46
47 /** @addtogroup STM32F10x_System_Private_Defines
48 * @{
49 */
50
51 /*!< Uncomment the line corresponding to the desired System clock (SYSCLK)
52 frequency (after reset the HSI is used as SYSCLK source)
53
54 IMPORTANT NOTE:
55 ==============
56 1. After each device reset the HSI is used as System clock source.
57
58 2. Please make sure that the selected System clock doesn't exceed your device's
59 maximum frequency.
60
61 3. If none of the define below is enabled, the HSI is used as System clock
62 source.
63
64 4. The System clock configuration functions provided within this file assume that:
65 - For Low, Medium and High density Value line devices an external 8MHz
66 crystal is used to drive the System clock.
67 - For Low, Medium and High density devices an external 8MHz crystal is
68 used to drive the System clock.
69 - For Connectivity line devices an external 25MHz crystal is used to drive
70 the System clock.
71 If you are using different crystal you have to adapt those functions accordingly.
72 */
73
74 #if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
75 /* #define SYSCLK_FREQ_HSE HSE_VALUE */
76 #define SYSCLK_FREQ_24MHz 24000000
77 #else
78 /* #define SYSCLK_FREQ_HSE HSE_VALUE */
79 /* #define SYSCLK_FREQ_24MHz 24000000 */
80 /* #define SYSCLK_FREQ_36MHz 36000000 */
81 /* #define SYSCLK_FREQ_48MHz 48000000 */
82 /* #define SYSCLK_FREQ_56MHz 56000000 */
83 #define SYSCLK_FREQ_72MHz 72000000
84 #endif
85
86 /*!< Uncomment the following line if you need to use external SRAM mounted
87 on STM3210E-EVAL board (STM32 High density and XL-density devices) or on
88 STM32100E-EVAL board (STM32 High-density value line devices) as data memory */
89 #if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
90 /* #define DATA_IN_ExtSRAM */
91 #endif
92
93 /*!< Uncomment the following line if you need to relocate your vector Table in
94 Internal SRAM. */
95 /* #define VECT_TAB_SRAM */
96 #define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field.
97 This value must be a multiple of 0x100. */
98
99
100 /**
101 * @}
102 */
103
104 /** @addtogroup STM32F10x_System_Private_Macros
105 * @{
106 */
107
108 /**
109 * @}
110 */
111
112 /** @addtogroup STM32F10x_System_Private_Variables
113 * @{
114 */
115
116 /*******************************************************************************
117 * Clock Definitions
118 *******************************************************************************/
119 #ifdef SYSCLK_FREQ_HSE
120 uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */
121 #elif defined SYSCLK_FREQ_24MHz
122 uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */
123 #elif defined SYSCLK_FREQ_36MHz
124 uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */
125 #elif defined SYSCLK_FREQ_48MHz
126 uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */
127 #elif defined SYSCLK_FREQ_56MHz
128 uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */
129 #elif defined SYSCLK_FREQ_72MHz
\ In section .data, align 4
130 uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */
\ SystemCoreClock:
\ 00000000 00A24A04 DC32 72000000
131 #else /*!< HSI Selected as System Clock source */
132 uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */
133 #endif
134
\ In section .data, align 4
135 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
\ AHBPrescTable:
\ 00000000 000000000000 DC8 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9
\ 000001020304
\ 06070809
136 /**
137 * @}
138 */
139
140 /** @addtogroup STM32F10x_System_Private_FunctionPrototypes
141 * @{
142 */
143
144 static void SetSysClock(void);
145
146 #ifdef SYSCLK_FREQ_HSE
147 static void SetSysClockToHSE(void);
148 #elif defined SYSCLK_FREQ_24MHz
149 static void SetSysClockTo24(void);
150 #elif defined SYSCLK_FREQ_36MHz
151 static void SetSysClockTo36(void);
152 #elif defined SYSCLK_FREQ_48MHz
153 static void SetSysClockTo48(void);
154 #elif defined SYSCLK_FREQ_56MHz
155 static void SetSysClockTo56(void);
156 #elif defined SYSCLK_FREQ_72MHz
157 static void SetSysClockTo72(void);
158 #endif
159
160 #ifdef DATA_IN_ExtSRAM
161 static void SystemInit_ExtMemCtl(void);
162 #endif /* DATA_IN_ExtSRAM */
163
164 /**
165 * @}
166 */
167
168 /** @addtogroup STM32F10x_System_Private_Functions
169 * @{
170 */
171
172 /**
173 * @brief Setup the microcontroller system
174 * Initialize the Embedded Flash Interface, the PLL and update the
175 * SystemCoreClock variable.
176 * @note This function should be used only after reset.
177 * @param None
178 * @retval None
179 */
\ In section .text, align 2, keep-with-next
180 void SystemInit (void)
181 {
\ SystemInit:
\ 00000000 80B5 PUSH {R7,LR}
182 /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
183 /* Set HSION bit */
184 RCC->CR |= (uint32_t)0x00000001;
\ 00000002 .... LDR.N R0,??DataTable2 ;; 0x40021000
\ 00000004 0068 LDR R0,[R0, #+0]
\ 00000006 50F00100 ORRS R0,R0,#0x1
\ 0000000A .... LDR.N R1,??DataTable2 ;; 0x40021000
\ 0000000C 0860 STR R0,[R1, #+0]
185
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