counter_7seg.sim.qmsg

带分频器的bcd计数电路设计

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition " "Info: Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 27 11:22:57 2006 " "Info: Processing started: Mon Mar 27 11:22:57 2006"