key_scan1.qsf

用verilog实现的四乘四键盘程序,在Quartus II上编译通过并成功

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		key_scan1_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:28:58  AUGUST 27, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VERILOG_FILE com_digit.v
set_global_assignment -name VERILOG_FILE cout6.v
set_global_assignment -name VERILOG_FILE d.v
set_global_assignment -name VERILOG_FILE decode47.v
set_global_assignment -name VERILOG_FILE div_clk.v
set_global_assignment -name VERILOG_FILE key_scan.v
set_global_assignment -name VERILOG_FILE mux1_6.v
set_global_assignment -name VERILOG_FILE mux6_1.v
set_global_assignment -name BDF_FILE key_scan1.bdf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_183 -to clk_in
set_location_assignment PIN_196 -to com_dec_bit[0]
set_location_assignment PIN_195 -to com_dec_bit[1]
set_location_assignment PIN_193 -to com_dec_bit[2]
set_location_assignment PIN_192 -to com_dec_bit[3]
set_location_assignment PIN_191 -to com_dec_bit[4]
set_location_assignment PIN_190 -to com_dec_bit[5]
set_location_assignment PIN_64 -to rst
set_location_assignment PIN_199 -to segment[6]
set_location_assignment PIN_200 -to segment[5]
set_location_assignment PIN_202 -to segment[4]
set_location_assignment PIN_203 -to segment[3]
set_location_assignment PIN_204 -to segment[2]
set_location_assignment PIN_205 -to segment[1]
set_location_assignment PIN_206 -to segment[0]
set_location_assignment PIN_74 -to diny1
set_location_assignment PIN_75 -to diny2
set_location_assignment PIN_78 -to diny3
set_location_assignment PIN_79 -to diny4
set_location_assignment PIN_83 -to scan_out[0]
set_location_assignment PIN_85 -to scan_out[1]
set_location_assignment PIN_86 -to scan_out[2]
set_location_assignment PIN_87 -to scan_out[3]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY ACEX1K
set_global_assignment -name TOP_LEVEL_ENTITY key_scan1

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EP1K30QC208-3"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1