📄 key_scan2.rpt
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Project Information f:\verilog\竞赛\key_scan1\key_scan2.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 08/26/2005 23:33:10
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Memory Memory LCs
POF Device Pins Pins Pins Bits % Utilized LCs % Utilized
key_scan2
EP1K100QC208-1 6 17 0 0 0 % 185 3 %
User Pins: 6 17 0
Project Information f:\verilog\竞赛\key_scan1\key_scan2.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
key_scan2@183 clk_in
key_scan2@177 com_dec_bit0
key_scan2@176 com_dec_bit1
key_scan2@175 com_dec_bit2
key_scan2@174 com_dec_bit3
key_scan2@173 com_dec_bit4
key_scan2@172 com_dec_bit5
key_scan2@160 diny1
key_scan2@163 diny2
key_scan2@167 diny3
key_scan2@168 diny4
key_scan2@64 rst
key_scan2@147 scan_out0
key_scan2@148 scan_out1
key_scan2@149 scan_out2
key_scan2@150 scan_out3
key_scan2@187 segment0
key_scan2@189 segment1
key_scan2@190 segment2
key_scan2@191 segment3
key_scan2@192 segment4
key_scan2@193 segment5
key_scan2@195 segment6
Project Information f:\verilog\竞赛\key_scan1\key_scan2.rpt
** FILE HIERARCHY **
|qudou:13|
|qudou:13|d:17|
|qudou:13|d:18|
|qudou:11|
|qudou:11|d:17|
|qudou:11|d:18|
|qudou:10|
|qudou:10|d:17|
|qudou:10|d:18|
|qudou:6|
|qudou:6|d:17|
|qudou:6|d:18|
|decode47:37|
|div_clk:42|
|div_clk:42|lpm_add_sub:146|
|div_clk:42|lpm_add_sub:146|addcore:adder|
|div_clk:42|lpm_add_sub:146|altshift:result_ext_latency_ffs|
|div_clk:42|lpm_add_sub:146|altshift:carry_ext_latency_ffs|
|div_clk:42|lpm_add_sub:146|altshift:oflow_ext_latency_ffs|
|mux1_6:49|
|mux6_1:53|
|com_digit:54|
|key_scan:59|
|key_scan:59|lpm_add_sub:144|
|key_scan:59|lpm_add_sub:144|addcore:adder|
|key_scan:59|lpm_add_sub:144|altshift:result_ext_latency_ffs|
|key_scan:59|lpm_add_sub:144|altshift:carry_ext_latency_ffs|
|key_scan:59|lpm_add_sub:144|altshift:oflow_ext_latency_ffs|
|cout6:61|
|cout6:61|lpm_add_sub:36|
|cout6:61|lpm_add_sub:36|addcore:adder|
|cout6:61|lpm_add_sub:36|altshift:result_ext_latency_ffs|
|cout6:61|lpm_add_sub:36|altshift:carry_ext_latency_ffs|
|cout6:61|lpm_add_sub:36|altshift:oflow_ext_latency_ffs|
Device-Specific Information: f:\verilog\竞赛\key_scan1\key_scan2.rpt
key_scan2
***** Logic for device 'key_scan2' compiled without errors.
Device: EP1K100QC208-1
ACEX 1K Configuration Scheme: Passive Serial
Device Options:
User-Supplied Start-Up Clock = OFF
Auto-Restart Configuration on Frame Error = OFF
Release Clears Before Tri-States = OFF
Enable Chip_Wide Reset = OFF
Enable Chip-Wide Output Enable = OFF
Enable INIT_DONE Output = OFF
JTAG User Code = 7f
MultiVolt I/O = OFF
Enable Lock Output = OFF
c c c c c c
o o o o o o
m m m m m m
_ _ _ _ _ _
R R R R R R R R R R R R s s s s s s s R R R d d d d d d R R R R R R R R R
E E E E E E E E E E E E e e e e e e e E E E e e e e e e E E E E E E E E E
S S S S S S S V S S S S S g g g g g g g S V c S S c c c c c c S S S S S S S S S
E E E E E E E C E E E E E m V m m m m m m E C l E E V _ _ _ _ _ _ E E d d E V E d E E d E E E
R R R R R R R C R R R R R e C e e e e e e R C k R R C b b b b b b R R i i R C R i R R i R R R
V V V V V V V I V V V V V n C n n n n n G n V I G _ G G V V C i i i i i i G V V n n V C V n V V n V V V
E E E E E E E N E E E E E t I t t t t t N t E N N i N N E E I t t t t t t N E E y y E I E y E E y E E E
D D D D D D D T D D D D D 6 O 5 4 3 2 1 D 0 D T D n D D D D O 0 1 2 3 4 5 D D D 4 3 D O D 2 D D 1 D D D
----------------------------------------------------------------------------------------------------------_
/ 208 206 204 202 200 198 196 194 192 190 188 186 184 182 180 178 176 174 172 170 168 166 164 162 160 158 |_
/ 207 205 203 201 199 197 195 193 191 189 187 185 183 181 179 177 175 173 171 169 167 165 163 161 159 157 |
#TCK | 1 156 | ^DATA0
^CONF_DONE | 2 155 | ^DCLK
^nCEO | 3 154 | ^nCE
#TDO | 4 153 | #TDI
VCCIO | 5 152 | VCCINT
GND | 6 151 | GND
RESERVED | 7 150 | scan_out3
RESERVED | 8 149 | scan_out2
RESERVED | 9 148 | scan_out1
RESERVED | 10 147 | scan_out0
RESERVED | 11 146 | VCCIO
RESERVED | 12 145 | GND
RESERVED | 13 144 | RESERVED
RESERVED | 14 143 | RESERVED
RESERVED | 15 142 | RESERVED
RESERVED | 16 141 | RESERVED
RESERVED | 17 140 | RESERVED
RESERVED | 18 139 | RESERVED
RESERVED | 19 138 | VCCIO
GND | 20 137 | GND
VCCINT | 21 136 | RESERVED
VCCIO | 22 135 | RESERVED
GND | 23 134 | RESERVED
RESERVED | 24 133 | RESERVED
RESERVED | 25 132 | RESERVED
RESERVED | 26 131 | RESERVED
RESERVED | 27 EP1K100QC208-1 130 | VCCINT
RESERVED | 28 129 | GND
RESERVED | 29 128 | RESERVED
RESERVED | 30 127 | RESERVED
RESERVED | 31 126 | RESERVED
GND | 32 125 | RESERVED
VCCINT | 33 124 | VCCINT
VCCIO | 34 123 | GND
GND | 35 122 | RESERVED
RESERVED | 36 121 | RESERVED
RESERVED | 37 120 | RESERVED
RESERVED | 38 119 | RESERVED
RESERVED | 39 118 | VCCIO
RESERVED | 40 117 | GND
RESERVED | 41 116 | RESERVED
VCCIO | 42 115 | RESERVED
GND | 43 114 | RESERVED
RESERVED | 44 113 | RESERVED
RESERVED | 45 112 | RESERVED
RESERVED | 46 111 | RESERVED
RESERVED | 47 110 | VCCIO
VCCINT | 48 109 | GND
GND | 49 108 | ^MSEL0
#TMS | 50 107 | ^MSEL1
#TRST | 51 106 | VCCINT
^nSTATUS | 52 105 | ^nCONFIG
| 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 _|
\ 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 |
\-----------------------------------------------------------------------------------------------------------
R R R R R R G R R R R r R V R R R R R V R R R G V G G G G G R V R R R R R R V R R R R R R V R R R R R R
E E E E E E N E E E E s E C E E E E E C E E E N C N N N N N E C E E E E E E C E E E E E E C E E E E E E
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