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📄 tiaoping.fit.eqn

📁 条屏控制器的CPLD编程,主要完成移位寄存器、编码器和译码器的功能
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A1L47Q = DFFE(A1L47Q_reg_input, GLOBAL(clk), !A1L47Q_p2_out, !A1L47Q_p4_out, A1L47Q_p3_out);


--A1L96 is serial_or~130 at SEXP30
A1L96 = EXP(H2_5 & H2_6);


--A1L07 is serial_or~131 at SEXP32
A1L07 = EXP(H2_5 & H2_7);


--A1L17 is serial_or~132 at SEXP18
A1L17 = EXP(H2_5 & H2_8);


--A1L27 is serial_or~133 at SEXP24
A1L27 = EXP(flag_init & flag_low);


--A1L37 is serial_or~134 at SEXP27
A1L37 = EXP(!flag_low & !flag_data);


--A1L66Q is serial_og~reg0 at LC21
A1L66Q_p1_out = A1L34 & A1L44 & A1L54 & A1L83 & A1L93 & A1L04 & A1L14 & A1L24;
A1L66Q_or_out = A1L66Q_p1_out;
A1L66Q_reg_input = !(A1L66Q_or_out);
A1L66Q_p2_out = !A1L66Q & !cpld_sel & !p1_6;
A1L66Q_p4_out = !p1_6 & A1L56;
A1L66Q_p3_out = A1L96 & A1L07 & A1L17 & A1L27 & !d_sel & flag_counter & wr & A1L37;
A1L66Q = DFFE(A1L66Q_reg_input, GLOBAL(clk), !A1L66Q_p2_out, !A1L66Q_p4_out, A1L66Q_p3_out);


--A1L63 is flag_low~179 at LC56
A1L63_p1_out = !H2_5 & flag_low & flag_counter & wr;
A1L63 = A1L63_p1_out;


--A1L73 is flag_low~181 at LC61
A1L73_p1_out = flag_low & flag_counter & !H2_5 & wr & !flag_data;
A1L73 = A1L73_p1_out;


--H2L5 is lpm_counter:data_count_rtl_1|p8count:p8c[0]|22~49 at LC9
H2L5_p1_out = !H2_5 & !flag_init & flag_counter & wr & flag_low;
H2L5 = H2L5_p1_out;


--A1L21 is clk_out~88 at LC25
A1L21_p1_out = flag_data & !H2_5 & !flag_low & flag_counter & wr & !A1L41Q;
A1L21 = A1L21_p1_out;


--B2L1 is lpm_counter:counter_rtl_0|_~308 at LC6
B2L1_p1_out = !H2_5 & !flag_init & flag_counter & wr & flag_low;
B2L1 = B2L1_p1_out;


--B2L2 is lpm_counter:counter_rtl_0|_~310 at LC11
B2L2_p1_out = !H2_5 & !flag_init & !B2_dffs[0] & flag_counter & wr & flag_low;
B2L2 = B2L2_p1_out;


--B2L3 is lpm_counter:counter_rtl_0|_~312 at LC13
B2L3_p1_out = !H2_5 & !flag_init & !B2_dffs[1] & !B2_dffs[0] & flag_counter & wr & flag_low;
B2L3 = B2L3_p1_out;


--A1L53 is flag_low~170sexp at SEXP49
A1L53 = EXP(!cpld_sel & !flag_low);


--A1L13 is flag_data~65sexp at SEXP50
A1L13 = EXP(!cpld_sel & flag_data);


--A1L33 is flag_init~59sexp at SEXP5
A1L33 = EXP(!cpld_sel & flag_init);


--A1L51 is counter~135sexp at SEXP6
A1L51 = EXP(!cpld_sel & B2_dffs[0]);


--A1L61 is counter~137sexp at SEXP8
A1L61 = EXP(!cpld_sel & B2_dffs[1]);


--A1L71 is counter~139sexp at SEXP9
A1L71 = EXP(!cpld_sel & B2_dffs[2]);


--A1L86 is serial_or~128sexp at SEXP29
A1L86 = EXP(!A1L47Q & !cpld_sel);


--A1L56 is serial_og~93sexp at SEXP31
A1L56 = EXP(!A1L66Q & !cpld_sel);


--A1L83 is Mux~599sexp1 at SEXP22
A1L83 = EXP(!temp[1] & !B2_dffs[2] & !B2_dffs[0] & B2_dffs[1]);


--A1L93 is Mux~599sexp2 at SEXP21
A1L93 = EXP(!temp[2] & !B2_dffs[2] & B2_dffs[0] & B2_dffs[1]);


--A1L04 is Mux~599sexp3 at SEXP20
A1L04 = EXP(!temp[7] & !B2_dffs[2] & !B2_dffs[0] & !B2_dffs[1]);


--A1L14 is Mux~599sexp4 at SEXP19
A1L14 = EXP(!temp[0] & !B2_dffs[2] & B2_dffs[0] & !B2_dffs[1]);


--A1L24 is Mux~599sexp5 at SEXP17
A1L24 = EXP(!temp[4] & B2_dffs[2] & B2_dffs[0] & !B2_dffs[1]);


--A1L11 is clk_out~86sexpbal at LC28
A1L11_p1_out = !cpld_sel & A1L41Q;
A1L11_or_out = A1L11_p1_out;
A1L11 = !(A1L11_or_out);


--p1_5 is p1_5 at PIN_38
--operation mode is input

p1_5 = INPUT();


--p1_6 is p1_6 at PIN_39
--operation mode is input

p1_6 = INPUT();


--p1_3 is p1_3 at PIN_8
--operation mode is input

p1_3 = INPUT();


--p1_4 is p1_4 at PIN_2
--operation mode is input

p1_4 = INPUT();


--clk is clk at PIN_37
--operation mode is input

clk = INPUT();


--rd is rd at PIN_11
--operation mode is input

rd = INPUT();


--wr is wr at PIN_10
--operation mode is input

wr = INPUT();


--d_sel is d_sel at PIN_40
--operation mode is input

d_sel = INPUT();


--din[0] is din[0] at PIN_34
--operation mode is input

din[0] = INPUT();


--din[1] is din[1] at PIN_33
--operation mode is input

din[1] = INPUT();


--din[2] is din[2] at PIN_31
--operation mode is input

din[2] = INPUT();


--din[3] is din[3] at PIN_30
--operation mode is input

din[3] = INPUT();


--din[4] is din[4] at PIN_28
--operation mode is input

din[4] = INPUT();


--din[5] is din[5] at PIN_27
--operation mode is input

din[5] = INPUT();


--din[6] is din[6] at PIN_25
--operation mode is input

din[6] = INPUT();


--din[7] is din[7] at PIN_23
--operation mode is input

din[7] = INPUT();


--sel_addr0 is sel_addr0 at PIN_44
--operation mode is input

sel_addr0 = INPUT();


--sel_addr1 is sel_addr1 at PIN_43
--operation mode is input

sel_addr1 = INPUT();


--cpld_sel is cpld_sel at PIN_42
--operation mode is input

cpld_sel = INPUT();


--xlat is xlat at PIN_18
--operation mode is output

xlat = OUTPUT(A1L84);


--oe_out is oe_out at PIN_14
--operation mode is output

oe_out = OUTPUT(A1L05);


--sel_out0 is sel_out0 at PIN_3
--operation mode is output

sel_out0 = OUTPUT(A1L75);


--sel_out1 is sel_out1 at PIN_5
--operation mode is output

sel_out1 = OUTPUT(A1L95);


--sel_out2 is sel_out2 at PIN_35
--operation mode is output

sel_out2 = OUTPUT(A1L16);


--sel_out3 is sel_out3 at PIN_6
--operation mode is output

sel_out3 = OUTPUT(A1L36);


--addr_out0 is addr_out0 at PIN_22
--operation mode is output

addr_out0 = OUTPUT(A1L2Q);


--addr_out1 is addr_out1 at PIN_21
--operation mode is output

addr_out1 = OUTPUT(A1L4Q);


--addr_out2 is addr_out2 at PIN_20
--operation mode is output

addr_out2 = OUTPUT(A1L6Q);


--addr_out3 is addr_out3 at PIN_19
--operation mode is output

addr_out3 = OUTPUT(A1L8Q);


--clk_out is clk_out at PIN_15
--operation mode is output

clk_out = OUTPUT(A1L31);


--serial_or is serial_or at PIN_13
--operation mode is output

serial_or = OUTPUT(A1L47Q);


--serial_og is serial_og at PIN_12
--operation mode is output

serial_og = OUTPUT(A1L66Q);






--A1L31 is clk_out~90 at LC17
A1L31_or_out = A1L41Q;
A1L31 = A1L31_or_out;


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