example14-13.vhd

vhdl 实例 通过实例学习vhdl 编程

LIBRARY IEEE;
USE IEEE.std_logic_1164.all;

ENTITY decode IS
	PORT (
		opcode: IN std_logic_vector (7 downto 0);
		byte1: IN std_logic_vector (7 downto 0);
		byte2: IN std_logic_vector (7 downto 0);
		is_1byte: INOUT std_logic;
		is_2byte: INOUT std_logic;
		is_3byte: INOUT std_logic;
		ALU_ctl: OUT std_logic_vector(6 downto 0)
		);
END decode;

ARCHITECTURE behave OF decode IS
	SIGNAL acall:std_logic;	
	SIGNAL add_A_Rn:std_logic;
	SIGNAL add_A_dir:std_logic;
	SIGNAL add_A_Ri:std_logic;
	SIGNAL add_A_data:std_logic;	
	SIGNAL adc_A_Rn:std_logic;
	SIGNAL adc_A_dir:std_logic;
	SIGNAL adc_A_Ri:std_logic;
	SIGNAL adc_A_data:std_logic;	
	SIGNAL ajmp:std_logic;			
	SIGNAL anl_A_Rn:std_logic;
	SIGNAL anl_A_dir:std_logic;
	SIGNAL anl_A_Ri:std_logic;
	SIGNAL anl_A_data:std_logic;
	SIGNAL anl_dir_A:std_logic;
	SIGNAL anl_dir_data:std_logic;	
	SIGNAL anl_C_bit:std_logic;
	SIGNAL anl_C_Nbit:std_logic;  	
	SIGNAL cjne_A_dir:std_logic;
	SIGNAL cjne_A_data:std_logic;
	SIGNAL cjne_Ri_data:std_logic;
	SIGNAL cjne_Rn_data:std_logic;	
	SIGNAL clr_A:std_logic;
	SIGNAL clr_C:std_logic;
	SIGNAL clr_bit:std_logic;	  	
	SIGNAL cpl_A:std_logic;
	SIGNAL cpl_C:std_logic;
	SIGNAL cpl_bit:std_logic;	  	
	SIGNAL da:std_logic;		  	
	SIGNAL dec_A:std_logic;
	SIGNAL dec_Rn:std_logic;
	SIGNAL dec_dir:std_logic;
	SIGNAL dec_Ri:std_logic;	  	
	SIGNAL div_AB:std_logic;	  	
	SIGNAL djne_Rn:std_logic;
	SIGNAL djne_dir:std_logic;	  	
	SIGNAL inc_A:std_logic;
	SIGNAL inc_Rn:std_logic;
	SIGNAL inc_dir:std_logic;
	SIGNAL inc_Ri:std_logic;	  	
	SIGNAL inc_DPTR:std_logic;	  	
	SIGNAL jb_bit:std_logic;
	SIGNAL jbc_bit:std_logic;
	SIGNAL jc_C:std_logic;
	SIGNAL jmp_A_DPTR:std_logic;  	
	SIGNAL jnb_bit:std_logic;
	SIGNAL jnc_c:std_logic;		  	
	SIGNAL jnz_A:std_logic;
	SIGNAL jz_A:std_logic;		  	
	SIGNAL lcall:std_logic;
	SIGNAL ljmp:std_logic;		  	
	SIGNAL mov_A_Rn:std_logic;
	SIGNAL mov_A_dir:std_logic;
	SIGNAL mov_A_Ri:std_logic;
	SIGNAL mov_A_data:std_logic;	
	SIGNAL mov_Rn_A:std_logic;
	SIGNAL mov_Rn_dir:std_logic;
	SIGNAL mov_Rn_data:std_logic;
	SIGNAL mov_dir_A:std_logic;
	SIGNAL mov_dir_Rn:std_logic;
	SIGNAL mov_dir_dir:std_logic;
	SIGNAL mov_dir_Ri:std_logic;
	SIGNAL mov_dir_data:std_logic;
	SIGNAL mov_Ri_A:std_logic;
	SIGNAL mov_Ri_dir:std_logic;
	SIGNAL mov_Ri_data:std_logic;	
	SIGNAL mov_C_bit:std_logic;
	SIGNAL mov_bit_C:std_logic;	 	
	SIGNAL mov_DPTR_data:std_logic;	
	SIGNAL movc_A_DPTR:std_logic;
	SIGNAL movc_A_PC:std_logic;	   	
	SIGNAL movx_A_Ri:std_logic;
	SIGNAL movx_A_DPTR:std_logic;
	SIGNAL movx_Ri_A:std_logic;
	SIGNAL movx_DPTR_A:std_logic;   	
	SIGNAL mul_AB:std_logic;	   	
	SIGNAL nop:std_logic;		   	
	SIGNAL orl_A_Rn:std_logic;
	SIGNAL orl_A_dir:std_logic;
	SIGNAL orl_A_Ri:std_logic;
	SIGNAL orl_A_data:std_logic;
	SIGNAL orl_dir_A:std_logic;
	SIGNAL orl_dir_data:std_logic;
	SIGNAL orl_C_bit:std_logic;
	SIGNAL orl_C_Nbit:std_logic;
	SIGNAL pop_dir:std_logic;
	SIGNAL push_dir:std_logic;
	SIGNAL ret:std_logic;
	SIGNAL reti:std_logic;
	SIGNAL rl_A:std_logic;
	SIGNAL rlc_A:std_logic;
	SIGNAL rr_A:std_logic;
	SIGNAL rrc_A:std_logic;
	SIGNAL setb_C:std_logic;
	SIGNAL setb_bit:std_logic;
	SIGNAL sjmp:std_logic;
	SIGNAL subb_A_Rn:std_logic;
	SIGNAL subb_A_dir:std_logic;
	SIGNAL subb_A_Ri:std_logic;
	SIGNAL subb_A_data:std_logic;
	SIGNAL swap_A:std_logic;
	SIGNAL xch_A_Rn:std_logic;
	SIGNAL xch_A_dir:std_logic;
	SIGNAL xch_A_Ri:std_logic;
	SIGNAL xchd_A_Ri:std_logic;
	SIGNAL xrl_A_Rn:std_logic;
	SIGNAL xrl_A_dir:std_logic;
	SIGNAL xrl_A_Ri:std_logic;
	SIGNAL xrl_A_data:std_logic;
	SIGNAL xrl_dir_A:std_logic;
	SIGNAL xrl_dir_data:std_logic;
	SIGNAL esc:std_logic;
	SIGNAL add_op:std_logic;
	SIGNAL adc_op:std_logic;
	SIGNAL subb_op:std_logic;
	SIGNAL inc_op:std_logic;
	SIGNAL dec_op:std_logic;
	SIGNAL anl_A_op:std_logic;
	SIGNAL orl_A_op:std_logic;
	SIGNAL xrl_A_op:std_logic;
	SIGNAL anl_d_op:std_logic;
	SIGNAL orl_d_op:std_logic;
	SIGNAL xrl_d_op:std_logic;
	SIGNAL anl_op:std_logic;
	SIGNAL orl_op:std_logic;
	SIGNAL xrl_op:std_logic;
	SIGNAL rl_A_op:std_logic;
	SIGNAL rr_A_op:std_logic;
	SIGNAL mov_A:std_logic;
	SIGNAL mov_Rn:std_logic;
	SIGNAL mov_dir:std_logic;
	SIGNAL mov_Ri:std_logic;
	SIGNAL movc:std_logic;
	SIGNAL movx:std_logic;
	SIGNAL xch_A:std_logic;
	SIGNAL bit_addr:std_logic;
	SIGNAL not_C:std_logic;
	SIGNAL not_bit:std_logic;
	SIGNAL wb_C:std_logic;
	SIGNAL wb_bit:std_logic;
	SIGNAL defa_op:std_logic;
	
BEGIN					 
	--opcode part assignment
	acall<='1' WHEN opcode(4 downto 0)="10001" ELSE '0';
	add_A_Rn<='1' WHEN opcode(7 downto 3)="00101" ELSE '0';
	add_A_dir<='1' WHEN opcode="00100101" ELSE '0';
	add_A_Ri<='1' WHEN opcode(7 downto 1)="0010011" ELSE '0';
	add_A_data<='1' WHEN opcode="00100100" ELSE '0';
	adc_A_Rn<='1' WHEN opcode(7 downto 3)="00111" ELSE '0';
	adc_A_dir<='1' WHEN opcode="00110101" ELSE '0';
	adc_A_Ri<='1' WHEN opcode(7 downto 1)="0011011" ELSE '0';
	adc_A_data<='1' WHEN opcode="00110100" ELSE '0';
	ajmp<='1' WHEN opcode(4 downto 0)="00001" ELSE '0';
	anl_A_Rn<='1' WHEN opcode(7 downto 3)="01011" ELSE '0';
	anl_A_dir<='1' WHEN opcode="01010101" ELSE '0';
	anl_A_Ri<='1' WHEN opcode(7 downto 1)="0101011" ELSE '0';
	anl_A_data<='1' WHEN opcode="01010100" ELSE '0';
	anl_dir_A<='1' WHEN opcode="01010010" ELSE '0';
	anl_dir_data<='1' WHEN opcode="01010011" ELSE '0';
	anl_C_bit<='1' WHEN opcode="10000010" ELSE '0';
	anl_C_Nbit<='1' WHEN opcode="10110000" ELSE '0';
	cjne_a_dir<='1' WHEN opcode="10000010" ELSE '0';
	cjne_A_data<='1' WHEN opcode="10110100" ELSE '0';
	cjne_Rn_data<='1' WHEN opcode(7 downto 3)="10111" ELSE '0';
	cjne_Ri_data<='1' WHEN opcode(7 downto 1)="1011011" ELSE '0';
	clr_A<='1' WHEN opcode="11100100" ELSE '0';
	clr_C<='1' WHEN opcode="11000011" ELSE '0';
	clr_bit<='1' WHEN opcode="11000010" ELSE '0';
	cpl_A<='1' WHEN opcode="11110100" ELSE '0';
	cpl_C<='1' WHEN opcode="10110011" ELSE '0';
	cpl_bit<='1' WHEN opcode="10110010" ELSE '0';
	da<='1' WHEN opcode="11010100" ELSE '0';
	dec_A<='1' WHEN opcode="00010100" ELSE '0';
	dec_Rn<='1' WHEN opcode(7 downto 3)="00011" ELSE '0';
	dec_dir<='1' WHEN opcode="00010101" ELSE '0';
	dec_Ri<='1' WHEN opcode(7 downto 1)="0001011" ELSE '0';
	div_AB<='1' WHEN opcode="10000100" ELSE '0';
	djne_Rn<='1' WHEN opcode(7 downto 3)="11011" ELSE '0';
	djne_dir<='1' WHEN opcode="11010101" ELSE '0';
	inc_A<='1' WHEN opcode="00000100" ELSE '0';
	inc_Rn<='1' WHEN opcode(7 downto 3)="00001" ELSE '0';
	inc_dir<='1' WHEN opcode="00000101" ELSE '0';
	inc_Ri<='1' WHEN opcode(7 downto 1)="0000011" ELSE '0';
	inc_DPTR<='1' WHEN opcode="10100011" ELSE '0';
	jb_bit<='1' WHEN opcode="00100000" ELSE '0';
	jbc_bit<='1' WHEN opcode="00010000" ELSE '0';
	jc_C<='1' WHEN opcode="01110011" ELSE '0';
	jnz_A<='1' WHEN opcode="01110000" ELSE '0';
	jz_A<='1' WHEN opcode="01100000" ELSE '0';
	lcall<='1' WHEN opcode="00010010" ELSE '0';
	ljmp<='1' WHEN opcode="00000010" ELSE '0';
	mov_A_Rn<='1' WHEN opcode(7 downto 3)="11101" ELSE '0';
	mov_A_dir<='1' WHEN opcode="11100101" ELSE '0';
	mov_A_Ri<='1' WHEN opcode(7 downto 1)="1110011" ELSE '0';
	mov_Rn_A<='1' WHEN opcode(7 downto 3)="11111" ELSE '0';
	mov_Rn_dir<='1' WHEN opcode(7 downto 3)="10101" ELSE '0';
	mov_Rn_data<='1' WHEN opcode(7 downto 3)="01111" ELSE '0';
	mov_dir_A<='1' WHEN opcode="11110101" ELSE '0';
	mov_dir_Rn<='1' WHEN opcode(7 downto 3)="10001" ELSE '0';
	mov_dir_dir<='1' WHEN opcode="10000101" ELSE '0';
	mov_dir_data<='1' WHEN opcode="01110101" ELSE '0';
	mov_Ri_A<='1' WHEN opcode(7 downto 1)="1111011" ELSE '0';
	mov_Ri_dir<='1' WHEN opcode(7 downto 1)="1010011" ELSE '0';
	mov_Ri_data<='1' WHEN opcode(7 downto 1)="0111011" ELSE '0';
	mov_C_bit<='1' WHEN opcode="10100010" ELSE '0';
	mov_bit_C<='1' WHEN opcode="10010010" ELSE '0';
	mov_DPTR_data<='1' WHEN opcode="10010000" ELSE '0';
	movc_A_DPTR<='1' WHEN opcode="10010011" ELSE '0';
	movc_A_PC<='1' WHEN opcode="10000011" ELSE '0';
	movx_A_Ri<='1' WHEN opcode(7 downto 1)="1110001" ELSE '0';
	movx_A_DPTR<='1' WHEN opcode="11100000" ELSE '0';
	movx_Ri_A<='1' WHEN opcode(7 downto 1)="1111001" ELSE '0';
	movx_DPTR_A<='1' WHEN opcode="11110100" ELSE '0';
	mul_AB<='1' WHEN opcode="10100100" ELSE '0';
	nop<='1' WHEN opcode="00000000" ELSE '0';
	orl_A_Rn<='1' WHEN opcode(7 downto 3)="01001" ELSE '0';
	orl_A_dir<='1' WHEN opcode="01000101" ELSE '0';
	orl_A_Ri<='1' WHEN opcode(7 downto 1)="0100011" ELSE '0';
	orl_A_data<='1' WHEN opcode="01000100" ELSE '0';
	orl_dir_A<='1' WHEN opcode="01000010" ELSE '0';
	orl_dir_data<='1' WHEN opcode="01000011" ELSE '0';
	orl_C_bit<='1' WHEN opcode="01110010" ELSE '0';
	orl_C_Nbit<='1' WHEN opcode="10100000" ELSE '0';
	pop_dir<='1' WHEN opcode="11010000" ELSE '0';
	push_dir<='1' WHEN opcode="11000000" ELSE '0';
	ret<='1' WHEN opcode="00100010" ELSE '0';
	reti<='1' WHEN opcode="00110010" ELSE '0';
	rl_A<='1' WHEN opcode="00100011" ELSE '0';
	rlc_A<='1' WHEN opcode="00110011" ELSE '0';
	rr_A<='1' WHEN opcode="00000011" ELSE '0';
	rrc_A<='1' WHEN opcode="00010011" ELSE '0';
	setb_C<='1' WHEN opcode="11010011" ELSE '0';
	setb_bit<='1' WHEN opcode="11010010" ELSE '0';
	sjmp<='1' WHEN opcode="10000000" ELSE '0';
	subb_A_Rn<='1' WHEN opcode(7 downto 3)="10011" ELSE '0';
	subb_A_dir<='1' WHEN opcode="10010101" ELSE '0';
	subb_A_Ri<='1' WHEN opcode(7 downto 1)="1001011" ELSE '0';
	subb_A_data<='1' WHEN opcode="10010100" ELSE '0';
	swap_A<='1' WHEN opcode="11000100" ELSE '0';
	xch_A_Rn<='1' WHEN opcode(7 downto 3)="11001" ELSE '0';
	xch_A_dir<='1' WHEN opcode="11000101" ELSE '0';
	xch_A_Ri<='1' WHEN opcode(7 downto 1)="1100011" ELSE '0';
	xchd_A_Ri<='1' WHEN opcode(7 downto 1)="1101011" ELSE '0';
	xrl_A_Rn<='1' WHEN opcode(7 downto 3)="01101" ELSE '0';
	xrl_A_dir<='1' WHEN opcode="01100101" ELSE '0';
	xrl_A_Ri<='1' WHEN opcode(7 downto 1)="0110011" ELSE '0';
	xrl_A_data<='1' WHEN opcode="01100100" ELSE '0';
	xrl_dir_A<='1' WHEN opcode="01100010" ELSE '0';
	xrl_dir_data<='1' WHEN opcode="01100011" ELSE '0';
	esc<='1' WHEN opcode="10100101" ELSE '0';
	--length of instruction
	is_2byte<='1' WHEN acall='1' or add_A_dir='1' or add_A_data='1'
	or adc_A_dir='1' or adc_A_data='1' or ajmp='1' or anl_A_dir='1'
	or anl_A_data='1' or anl_dir_A='1' or anl_C_bit='1' or anl_C_Nbit='1'
	or clr_bit='1' or cpl_bit='1' or dec_dir='1' or djne_Rn='1' 
	or inc_dir='1' or jc_C='1' or jnc_C='1' or jnz_A='1' or jz_A='1'
	or mov_A_dir='1' or mov_A_data='1' or mov_Rn_dir='1' or mov_Rn_data='1'
	or mov_dir_A='1' or mov_dir_Rn='1' or mov_Ri_dir='1' or mov_Ri_data='1'
	or mov_C_bit='1' or mov_bit_C='1' or orl_A_dir='1' or orl_A_data='1' 
	or orl_dir_A='1' or pop_dir='1' or push_dir='1' or setb_bit='1' or sjmp='1'
	or subb_A_dir='1' or subb_A_data='1' or xch_A_dir='1' or xrl_A_dir='1' 
	or xrl_A_data='1' or xrl_dir_A='1' or xrl_dir_data='1' ELSE '0';
	
	is_3byte<='1' WHEN anl_dir_data='1' or cjne_A_dir='1' or cjne_A_data='1'
	or djne_dir='1' or cjne_Rn_data='1' or cjne_Ri_data='1' or jb_bit='1'
	or jbc_bit='1' or jnb_bit='1' or lcall='1' or ljmp='1' or mov_dir_dir='1'
	or mov_dir_data='1' or mov_DPTR_data='1' or orl_dir_data='1' ELSE '0';
	
	is_1byte<='1' WHEN is_2byte='0' and is_3byte='0' and esc='0' ELSE '0';
	--instrunction type
	--arithmetic operation instructions
	add_op<='1' WHEN add_A_Rn='1' or add_A_dir='1' or add_A_Ri='1' or add_A_data='1' ELSE '0';
	adc_op<='1' WHEN adc_A_Rn='1' or adc_A_dir='1' or adc_A_Ri='1' or adc_A_data='1' ELSE '0';
	subb_op<='1' WHEN subb_A_Rn='1' or subb_A_dir='1' or subb_A_Ri='1' or subb_A_data='1' ELSE '0';
	inc_op<='1' WHEN inc_Rn='1' or inc_dir='1' or inc_Ri='1' or inc_A='1' ELSE '0';
	--logic operations instructions
	anl_A_op<='1' WHEN anl_A_Rn='1' or anl_A_dir='1' or anl_A_Ri='1' or anl_A_data='1' ELSE '0';
	orl_A_op<='1' WHEN orl_A_Rn='1' or orl_A_dir='1' or orl_A_Ri='1' or orl_A_data='1' ELSE '0';
	xrl_A_op<='1' WHEN xrl_A_Rn='1' or xrl_A_dir='1' or xrl_A_Ri='1' or xrl_A_data='1' ELSE '0';
	anl_d_op<='1' WHEN anl_dir_A='1' or anl_dir_data='1' ELSE '0';
	orl_d_op<='1' WHEN orl_dir_A='1' or orl_dir_data='1' ELSE '0';
	xrl_d_op<='1' WHEN xrl_dir_A='1' or xrl_dir_data='1' ELSE '0';
	anl_op<='1' WHEN anl_A_op='1' or anl_d_op='1' ELSE '0';
	orl_op<='1' WHEN orl_A_op='1' or orl_d_op='1' ELSE '0';
	xrl_op<='1' WHEN xrl_A_op='1' or xrl_d_op='1' ELSE '0';
	rl_A_op<='1' WHEN rl_A='1' or rlc_A='1' ELSE '0';
	rr_A_op<='1' WHEN rr_A='1' or rrc_A='1' ELSE '0';
	--data transfer instructions
	mov_A<='1' WHEN mov_A_Rn='1' or mov_A_dir='1' or mov_A_Ri='1' or mov_A_data='1' ELSE '0';
	mov_Rn<='1' WHEN mov_Rn_A='1' or mov_Rn_dir='1' or mov_Rn_data='1' ELSE '0';
	mov_dir<='1' WHEN mov_dir_A='1' or mov_dir_Rn='1' or mov_dir_dir='1' or mov_dir_Ri='1'
	or mov_dir_data='1' ELSE '0';
	mov_Ri<='1' WHEN mov_Ri_A='1' or movx_A_DPTR='1' or movx_Ri_A='1' or movx_DPTR_A='1' ELSE '0';
	movc<='1' WHEN movc_A_DPTR='1' or movc_A_PC='1' ELSE '0';
	movx<='1' WHEN movx_A_Ri='1' or movx_A_DPTR='1' or movx_Ri_A='1' or movx_DPTR_A='1' ELSE '0';
	xch_A<='1' WHEN xch_A_Rn='1' or xch_A_dir='1' or xch_A_Ri='1' ELSE '0';
	--boolean operation instrunctions
	bit_addr<='1' WHEN clr_bit='1' or cpl_bit='1' or anl_C_bit='1' or anl_C_Nbit='1'
	or orl_C_bit='1' or orl_C_Nbit='1' or mov_C_bit='1' or jb_bit='1' or jbc_bit='1'
	or jnb_bit='1' or setb_bit='1' ELSE '0';
	not_C<='1' WHEN cpl_C='1' or jnc_C='1' ELSE '0';
	not_bit<='1' WHEN cpl_bit='1' or anl_C_Nbit='1' or orl_C_Nbit='1' or jnb_bit='1' ELSE '0';
	wb_C<='1' WHEN clr_C='1' or setb_C='1' or cpl_C='1' or anl_C_bit='1' or anl_C_Nbit='1'
	or orl_C_bit='1' or orl_C_Nbit='1' or mov_C_bit='1' ELSE '0';
	wb_bit<='1' WHEN clr_bit='1' or setb_bit='1' or cpl_bit='1' or mov_bit_C='1'
	or jbc_bit='1' ELSE '0';
	--ALU control code generation
	defa_op<='1' WHEN cpl_A='1' or cpl_A='1' or subb_op='1' or inc_op='1' or dec_op='1'
	or anl_op='1' or orl_op='1' or xrl_op='1' ELSE '0';
	PROCESS(cpl_A,clr_A,subb_op,inc_op,dec_op,anl_op,orl_op,xrl_op,defa_op)
	BEGIN
		IF cpl_A='1' THEN
			ALU_ctl(4 downto 0)<="10000";
		ELSIF clr_A='1' THEN
			ALU_ctl(4 downto 0)<="10011";
		ELSIF subb_op='1' THEN
			ALU_ctl(4 downto 0)<="00110";
		ELSIF inc_op='1' THEN
			ALU_ctl(4 downto 0)<="00000";
		ELSIF dec_op='1' THEN
			ALU_ctl(4 downto 0)<="01111";
		ELSIF anl_op='1' THEN
			ALU_ctl(4 downto 0)<="11011";
		ELSIF orl_op='1' THEN
			ALU_ctl(4 downto 0)<="11110";
		ELSIF xrl_op='1' THEN
			ALU_ctl(4 downto 0)<="10110";
		ELSIF defa_op='1' THEN
			ALU_ctl(4 downto 0)<="01001";
		ELSE
			ALU_ctl(4 downto 0)<="ZZZZZ";
		END IF;
	END PROCESS;
	ALU_ctl(6)<='1' WHEN subb_op='1' or dec_op='1' ELSE '0';
	ALU_ctl(5)<='1' WHEN adc_op='1' or add_op='1' or inc_op='1' ELSE '0';	
END behave;