clock.hif

这是我在学习过程中编的数字钟的原程序,含各种时钟模块,以及计数器,累加器等,可以直接下载,已经编译通过!

Version 5.0 Build 148 04/26/2005 SJ Web Edition
2
24
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
0
# entity
cnt60a
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cnt60a.vhd
1117953150
4
# storage
db|clock.(1).cnf
db|clock.(1).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
cnt60a:u2
}
# end
# entity
cnt_24
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cnt_24.vhd
1117954952
4
# storage
db|clock.(2).cnf
db|clock.(2).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
cnt_24:u3
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1114012448
6
# storage
db|clock.(3).cnf
db|clock.(3).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
ACEX1K
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
}
# used_port {
aclr
clk_en
clock
q0
q1
q2
q3
sclr
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
d:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
d:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107573980
d:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
d:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107574548
d:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
d:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107572664
d:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107572680
d:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107572320
d:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107572334
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
}
# end
# entity
alt_counter_f10ke
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.tdf
1114012450
6
# storage
db|clock.(4).cnf
db|clock.(4).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
USR
LPM_SVALUE
15
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
15
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
ACEX1K
PARAMETER_UNKNOWN
USR
}
# used_port {
clock
clk_en
aclr
sclr
q0
q1
q2
q3
cout
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
d:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
d:|altera|quartus50|libraries|megafunctions|flex10ke_lcell.inc
1107574288
}
# end
# entity
lpm_add_sub
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|lpm_add_sub.tdf
1114012446
6
# storage
db|clock.(5).cnf
db|clock.(5).cnf
# user_parameter {
LPM_WIDTH
32
PARAMETER_UNKNOWN
USR
LPM_REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
YES
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
1
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
ACEX1K
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_5nh
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
cin
dataa0
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
dataa16
dataa17
dataa18
dataa19
dataa1
dataa20
dataa21
dataa22
dataa23
dataa24
dataa25
dataa26
dataa27
dataa28
dataa29
dataa2
dataa30
dataa31
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
datab0
datab10
datab11
datab12
datab13
datab14
datab15
datab16
datab17
datab18
datab19
datab1
datab20
datab21
datab22
datab23
datab24
datab25
datab26
datab27
datab28
datab29
datab2
datab30
datab31
datab3
datab4
datab5
datab6
datab7
datab8
datab9
result0
result10
result11
result12
result13
result14
result15
result16
result17
result18
result19
result1
result20
result21
result22
result23
result24
result25
result26
result27
result28
result29
result2
result30
result31
result3
result4
result5
result6
result7
result8
result9
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
d:|altera|quartus50|libraries|megafunctions|alt_stratix_add_sub.inc
1107572606
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|look_add.inc
1107574364
d:|altera|quartus50|libraries|megafunctions|bypassff.inc
1107573920
d:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
d:|altera|quartus50|libraries|megafunctions|alt_mercury_add_sub.inc
1107572592
}
# end
# entity
addcore
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|addcore.tdf
1114012446
6
# storage
db|clock.(6).cnf
db|clock.(6).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
width
32
PARAMETER_UNKNOWN
USR
REPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
DIRECTION
ADD
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
ACEX1K
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
dataa4
dataa5
dataa6
dataa7
dataa8
dataa9
dataa10
dataa11
dataa12
dataa13
dataa14
dataa15
dataa16
dataa17
dataa18
dataa19
dataa20
dataa21
dataa22
dataa23
dataa24
dataa25
dataa26
dataa27
dataa28
dataa29
dataa30
dataa31
datab0
datab1
datab2
datab3
datab4
datab5
datab6
datab7
datab8
datab9
datab10
datab11
datab12
datab13
datab14
datab15
datab16
datab17
datab18
datab19
datab20
datab21
datab22
datab23
datab24
datab25
datab26
datab27
datab28
datab29
datab30
datab31
cin
result0
result1
result2
result3
result4
result5
result6
result7
result8
result9
result10
result11
result12
result13
result14
result15
result16
result17
result18
result19
result20
result21
result22
result23
result24
result25
result26
result27
result28
result29
result30
result31
}
# include_file {
d:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1114012420
d:|altera|quartus50|libraries|megafunctions|addcore.inc
1107572218
d:|altera|quartus50|libraries|megafunctions|a_csnbuffer.inc
1107571892
}
# end
# entity
a_csnbuffer
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|a_csnbuffer.tdf
1114012448
6
# storage
db|clock.(7).cnf
db|clock.(7).cnf
# user_parameter {
WIDTH
32
PARAMETER_UNKNOWN
USR
NEED_CARRY
0
PARAMETER_UNKNOWN
DEF
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
}
# used_port {
sin0
sout0
}
# end
# entity
a_csnbuffer
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|a_csnbuffer.tdf
1114012448
6
# storage
db|clock.(8).cnf
db|clock.(8).cnf
# user_parameter {
WIDTH
32
PARAMETER_UNKNOWN
USR
NEED_CARRY
1
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
USR
}
# used_port {
sin0
sin1
sin2
sin3
sin4
sin5
sin6
sin7
sin8
sin9
sin10
sin11
sin12
sin13
sin14
sin15
sin16
sin17
sin18
sin19
sin20
sin21
sin22
sin23
sin24
sin25
sin26
sin27
sin28
sin29
sin30
sin31
cin0
cin1
cin2
cin3
cin4
cin5
cin6
cin7
cin8
cin9
cin10
cin11
cin12
cin13
cin14
cin15
cin16
cin17
cin18
cin19
cin20
cin21
cin22
cin23
cin24
cin25
cin26
cin27
cin28
cin29
cin30
cin31
sout0
sout1
sout2
sout3
sout4
sout5
sout6
sout7
sout8
sout9
sout10
sout11
sout12
sout13
sout14
sout15
sout16
sout17
sout18
sout19
sout20
sout21
sout22
sout23
sout24
sout25
sout26
sout27
sout28
sout29
sout30
sout31
cout0
cout1
cout2
cout3
cout4
cout5
cout6
cout7
cout8
cout9
cout10
cout11
cout12
cout13
cout14
cout15
cout16
cout17
cout18
cout19
cout20
cout21
cout22
cout23
cout24
cout25
cout26
cout27
cout28
cout29
cout30
cout31
}
# end
# entity
altshift
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|altshift.tdf
1114012454
6
# storage
db|clock.(9).cnf
db|clock.(9).cnf
# user_parameter {
WIDTH
32
PARAMETER_UNKNOWN
USR
DEPTH
0
PARAMETER_UNKNOWN
USR
}
# used_port {
data0
data1
data2
data3
data4
data5
data6
data7
data8
data9
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data20
data21
data22
data23
data24
data25
data26
data27
data28
data29
data30
data31
result0
result1
result2
result3
result4
result5
result6
result7
result8
result9
result10
result11
result12
result13
result14
result15
result16
result17
result18
result19
result20
result21
result22
result23
result24
result25
result26
result27
result28
result29
result30
result31
}
# end
# entity
altshift
# case_insensitive
# source_file
d:|altera|quartus50|libraries|megafunctions|altshift.tdf
1114012454
6
# storage
db|clock.(10).cnf
db|clock.(10).cnf
# user_parameter {
WIDTH
1
PARAMETER_UNKNOWN
USR
DEPTH
0
PARAMETER_UNKNOWN
USR
}
# used_port {
data0
result0
}
# end
# entity
cnt60
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
cnt60.vhd
1117957114
4
# storage
db|clock.(0).cnf
db|clock.(0).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
cnt60:u1
}
# end
# entity
clock
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
clock.vhd
1117958474
4
# storage
db|clock.(11).cnf
db|clock.(11).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# complete