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来自「发一个基于ModelSim仿真的Verilog源代码包」· 代码 · 共 37 行

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cModel Technology
dD:\Modeltech_5.7d\YYH_ModelSim_Examples\Viterbi_ASIC_Book
vconvl3_en
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dD:\Modeltech_5.7d\YYH_ModelSim_Examples\covlen3
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vconvlen3_test
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dD:\Modeltech_5.7d\YYH_ModelSim_Examples\covlen3
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dD:\Modeltech_5.7d\YYH_ModelSim_Examples\covlen3
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FD:/Modeltech_5.7d/YYH_ModelSim_Examples/covlen3/dff.v
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