📄 mux8.pin
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-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.
----------------------------------------------------------------------------
CHIP "mux8" ASSIGNED TO AN EPF10K10LC84-3
clk : 1
a0 : 2
RESERVED : 3
VCCINT : 4
RESERVED : 5
RESERVED : 6
RESERVED : 7
RESERVED : 8
RESERVED : 9
RESERVED : 10
RESERVED : 11
DATA0 : 12
DCLK : 13
nCE : 14
TDI : 15
e1 : 16
c1 : 17
f1 : 18
b1 : 19
VCCINT : 20
e3 : 21
f3 : 22
c2 : 23
c3 : 24
d3 : 25
GNDINT : 26
f0 : 27
q0 : 28
RESERVED : 29
RESERVED : 30
MSEL0 : 31
MSEL1 : 32
VCCINT : 33
nCONFIG : 34
RESERVED : 35
RESERVED : 36
RESERVED : 37
RESERVED : 38
RESERVED : 39
VCCINT : 40
GNDINT : 41
b0 : 42
e0 : 43
c0 : 44
VCCINT : 45
GNDINT : 46
RESERVED : 47
a1 : 48
d1 : 49
RESERVED : 50
RESERVED : 51
sel2 : 52
sel1 : 53
RESERVED : 54
nSTATUS : 55
TRST : 56
TMS : 57
sel6 : 58
sel3 : 59
sel7 : 60
sel0 : 61
RESERVED : 62
VCCINT : 63
b2 : 64
a2 : 65
b3 : 66
q3 : 67
GNDINT : 68
q1 : 69
d2 : 70
e2 : 71
f2 : 72
q2 : 73
TDO : 74
nCEO : 75
CONF_DONE : 76
TCK : 77
sel5 : 78
sel4 : 79
RESERVED : 80
a3 : 81
GNDINT : 82
RESERVED : 83
d0 : 84
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