boole1.tdf

来自「verilog编写实用多功能电子表」· TDF 代码 · 共 10 行

SUBDESIGN boole1
(
	a0, a1, b		: INPUT;
	out1, out2	: OUTPUT;
)
BEGIN
	out1 = a1 & !a0;
	out2 = out1 # b;
END;