针对传统集成电路（ASIC）功能固定、升级困难等缺点，利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块，在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波，给出了DQPSK解调的原理和实现方法，推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言编写出源程序，在Virtex-II Pro 开发板上成功实现了整个系统。测试结果表明该系统正确实现了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上传时间： 2013-11-05
上传用户：liu123
This application note provides a functional description of VHDL source code for a N x N DigitalCrosspoint Switch. The code is designed with eight inputs and eight outputs in order to targetthe 128-macrocell CoolRunner™-II CPLD device but can be easily expanded to target higherdensity devices. To obtain the VHDL source code described in this document, go to sectionVHDL Code, page 5 for instructions.
标签： CoolRunner-II XAPP CPLD 380
上传时间： 2013-10-26
上传用户：kiklkook
针对传统集成电路（ASIC）功能固定、升级困难等缺点，利用FPGA实现了扩频通信芯片STEL-2000A的核心功能。使用ISE提供的DDS IP核实现NCO模块，在下变频模块调用了硬核乘法器并引入CIC滤波器进行低通滤波，给出了DQPSK解调的原理和实现方法，推导出一种简便的引入?仔/4固定相移的实现方法。采用模块化的设计方法使用VHDL语言编写出源程序，在Virtex-II Pro 开发板上成功实现了整个系统。测试结果表明该系统正确实现了STEL-2000A的核心功能。 Abstract: To overcome drawbacks of ASIC such as fixed functionality and upgrade difficulty, FPGA was used to realize the core functions of STEL-2000A. This paper used the DDS IP core provided by ISE to realize the NCO module, called hard core multiplier and implemented CIC filter in the down converter, described the principle and implementation detail of the demodulation of DQPSK, and derived a simple method to introduce a fixed phase shift of ?仔/4. The VHDL source code was designed by modularity method , and the complete system was successfully implemented on Virtex-II Pro development board. Test results indicate that this system successfully realize the core function of the STEL-2000A.
上传时间： 2013-11-19
上传用户：neu_liyan
波形发生器，带TESTBENCH， 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn
标签： 波形发生器
上传时间： 2014-01-19
上传用户：familiarsmile
This a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％). You may use this booklet for your own personal learning purposes. You may not use it for profit (eg, selling copies of it, using it in a course for which people pay, etc). If you want to make use of it beyond these conditions, contact me and we can come to some arrangement.
标签： Architecture Computer Students together
上传时间： 2014-01-15
上传用户：wxhwjf
modelsim_se_tutorThis is a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％).
标签： modelsim_se_tutorThis Architecture Computer together
上传时间： 2015-07-07
上传用户：xfbs821
This is a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％).
标签： Architecture Computer Students together
上传时间： 2013-12-25
上传用户：kelimu
摘要：本文主要介绍以CPLD 芯片进行十字路口的交通灯的设计，用CPLD 作为交通灯控制器的主控芯片，采用VHDL 语言编写控制程序，利用CPLD的可重复编程和在动态系统重构的特性，大大地提高了数字系统设计的灵活性和通用性。 关键词：CPLD；VHDL；交通灯控制器 中图分类号：TP39 Abstract ：This paper introduces the electronic-traffic lamp, which is based on the VHDL and is completed by
上传时间： 2013-12-30
上传用户：bruce
we will use the Spartan3 XC3S200 FPGA to design a specified counter using the language VHDL.
标签： the specified Spartan3 language
上传时间： 2015-05-13
上传用户：youke111
VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-modules scinode1∼ scinode9 reset and clk and global_cnt signals to synchronous the sub-modules to simplify the overall design. u proj2.wfc: VSS simulation result that is the same as the ModelSim simulation result. u Pro2_2.wfc: VSS simulation result of another test pattern can’t cause overflow situation.
标签： scinode1 scinode details 2DFFT
上传时间： 2014-12-02
上传用户：15071087253
