Computational models are commonly used in engineering design and scientific discovery activities for simulating complex physical systems in disciplines such as fluid mechanics, structural dynamics, heat transfer, nonlinear structural mechanics, shock physics, and many others. These simulators can be an enormous aid to engineers who want to develop an understanding and/or predictive capability for complex behaviors typically observed in the corresponding physical systems. Simulators often serve as virtual prototypes, where a set of predefined system parameters, such as size or location dimensions and material properties, are adjusted to improve the performance of a system, as defined by one or more system performance objectives. Such optimization or tuning of the virtual prototype requires executing the simulator, evaluating performance objective(s), and adjusting the system parameters in an iterative, automated, and directed way. System performance objectives can be formulated, for example, to minimize weight, cost, or defects; to limit a critical temperature, stress, or vibration response; or to maximize performance, reliability, throughput, agility, or design robustness. In addition, one would often like to design computer experiments, run parameter studies, or perform uncertainty quantification (UQ). These approaches reveal how system performance changes as a design or uncertain input variable changes. Sampling methods are often used in uncertainty quantification to calculate a distribution on system performance measures, and to understand which uncertain inputs contribute most to the variance of the outputs. A primary goal for Dakota development is to provide engineers and other disciplinary scientists with a systematic and rapid means to obtain improved or optimal designs or understand sensitivity or uncertainty using simulationbased models. These capabilities generally lead to improved designs and system performance in earlier design stages, alleviating dependence on physical prototypes and testing, shortening design cycles, and reducing product development costs. In addition to providing this practical environment for answering system performance questions, the Dakota toolkit provides an extensible platform for the research and rapid prototyping of customized methods and meta-algorithms
标签： Optimization and Uncertainty Quantification
上传时间： 2016-04-08
上传用户：huhu123456
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio™ suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio™ Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上传时间： 2016-05-06
上传用户：fagong
库代码，stm8s,自动生成,代码123456789
上传时间： 2016-07-12
上传用户：cy1109
支持大部分stm8 的硬件初始化函数，基本满足所有硬件初始化要求。
上传时间： 2016-08-09
上传用户：eddy77
The version of CodeWarrior used in the ARM Development Suite cannot export projects in makefile format. Manually producing makefiles from CodeWarrior projects is not an easy task. The aim of mcp2make is to make the conversion simpler and to require substantially less effort. mcp2make is supplied as a free-of-charge, unsupported utility.
标签： mcp2make
上传时间： 2017-01-19
上传用户：zbxinu
STM8Sdatasheep用户手册，欢迎各位前来下载
标签： STM8S
上传时间： 2017-04-21
上传用户：494985810
grid eye evaluation kit
标签： grid eye
上传时间： 2017-05-19
上传用户：cliburn
基于STVD STM8S TIM1定时编程源码加工程打开即用
上传时间： 2017-08-16
上传用户：jack_luo
//GPIO端口初始化配置函数GPIO_init()，无形参，无返回值 //TIM1功能初始化函数TIM1_init()，无形参,无返回值 //LCD1602初始化函数LCD1602_init()，无形参和返回值 //写入液晶模组命令或数据函数 //显示字符函数LCD1602_DIS()，无形参和返回值
上传时间： 2018-01-04
上传用户：walker.tang
void IIC_Init(void) { //由于STM8单片机，可以在输入和输出条件下读取IO口状态，故直接设置为输出。 GPIO_Init(IIC_SCL_PORT, IIC_SCL_PIN, GPIO_MODE_OUT_OD_HIZ_SLOW ); GPIO_Init(IIC_SDA_PORT, IIC_SDA_PIN, GPIO_MODE_OUT_OD_HIZ_SLOW ); IIC_SCL_H; IIC_SDA_H; } //产生IIC起始信号 void IIC_Start(void) { IIC_SDA_H; IIC_SCL_H; Delay_us(); IIC_SDA_L; //START:when CLK is high,DATA change form high to low Delay_us(); IIC_SCL_L; //钳住I2C总线，准备发送或接收数据 }
上传时间： 2018-01-10
上传用户：m009988
