# # Procedure to generate a gaussian process # setproc gaussprocess {{&signali corr} {&int size 4096} {&int flagZero 0}} \ "{{{ […
simulation tracking 源代码
汇集 simulation tracking 相关的电路原理图、PCB工程文件、单片机/FPGA源代码、数据手册与应用设计方案。
#!/usr/bin/python2.4 # Copyright 2007 Ben Lipkowitz # You may distribute this software under the GNU GPL v2 or later # # see emc2/…
CLOCK.vhdsim_synth -- generated only for ProjNav status tracking Simulation Model Target: ModelSim SE (VHDL)
my_sram.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Generic_VHDL
my_sram.vhdsim_xlate -- generated only for ProjNav status tracking Simulation Model Target: Generic_VHDL
dq024.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Modelsim_VHDL
mdecode.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Modelsim_VHDL
sel4_1.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Modelsim_VHDL
top.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Modelsim_VHDL
count4.vhdsim_par -- generated only for ProjNav status tracking Simulation Model Target: Modelsim_VHDL