The PCA9544A provides 4 interrupt inputs, one for each channeland one open drain interrupt output. When an interrupt is generated byany device, it will be detected by the PCA9544A and the interruptoutput will be driven LOW. The channel need not be active fordetection of the interrupt. A bit is also set in the control byte.Bits 4 – 7 of the control byte correspond to channels 0 – 3 of thePCA9544A, respectively. Therefore, if an interrupt is generated byany device connected to channel 2, the state of the interrupt inputs isloaded into the control register when a read is accomplished.Likewise, an interrupt on any device connected to channel 0 wouldcause bit 4 of the control register to be set on the read. The mastercan then address the PCA9544A and read the contents of thecontrol byte to determine which channel contains the devicegenerating the interrupt. The master can then reconfigure thePCA9544A to select this channel, and locate the device generatingthe interrupt and clear it. The interrupt clears when the deviceoriginating the interrupt clears.
标签： 4channel multiple 9544A 9544
上传时间： 2014-12-28
上传用户：潜水的三贡
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.
上传时间： 2013-12-07
上传用户：europa_lin
The Philips family of Multiplexers and Switches consists of bi-directional translating switches controlled via the I2C or SMBus to fan out an upstream SCL/SDA pair to 2, 4 or 8 downstream channels of SCx/SDx pairs. The Multiplexers allow only one downstream channel to be selected at a time, while the Switches allow any individual downstream channel or combination of downstream channels to be selected, depending on the content of the programmable control register. Once one or several channels have been selected, the device acts as a wire, allowing the master on the upstream channel to send commands to devices on all the active downstream channels, and devices on the active downstream channels to communicate with each other and the master. External pull-up resistors are used to pull each individual channel up to the desired voltage level. Combined interrupt output and hardware reset input are device options that are featured.
上传时间： 2013-10-11
上传用户：dianxin61
82C59A-2是为简化微处理机系统中断接口而实现的LSI外围芯片。也叫做PIC（Programmable Interrupt Controller）。是高性能高速度芯片。在多级优先级中断系统内82C59A-1402已经把CPU从对任务的轮询中解救出来。PCI可由软件进行控制，使用于各种不同的环境，联级可接受8~64个中断输入。 管脚与NMOS8259A-2兼容单片8级优先级，级联可扩64级多种可编程中断方式各自专用的请求屏蔽能力与Intel系列机兼容全部采用静态设计低功耗5V的电源供电。
上传时间： 2013-10-30
上传用户：zhliu007
Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.
上传时间： 2013-10-27
上传用户：zhangyigenius
The Infineon TriCore provides an Interrupt System with a high safety standard. Thisdocument contains some instructions on how to initiate an Interrupt from an externaldevice. First it will show you how to trigger an Interrupt Service Request by an impulseon Port 0 or Port 1. Then in the second part of the document you can find hints how todebounce impulses to enable the use of a simple switch as input device.Authors: Thomas Bliem, CQ Nguyen / Infineon SMI MD Apps
上传时间： 2013-11-05
上传用户：uuuuuuu
This application note demonstrates how to write an Inter Integrated Circuit bus driver (I2C) for the XA-S3 16-bitMicrocontroller from Philips Semiconductors.Not only the driver software is given. This note also contains a set of (example) interface routines and a smalldemo application program. All together it offers the user a quick start in writing a complete I2C system applicationwith the PXAS3x.The driver routines support interrupt driven single master transfers. Furthermore, the routines are suitable foruse in conjunction with real time operating systems.
上传时间： 2013-11-02
上传用户：zw380105939
基于单片机的汽车多功能报警系统设计The Design of Automobile Multi-function AlarmingBased on Single Chip Computer刘法治赵明富宁睡达(河 南 科 技 学 院 ，新 乡 453 00 3)摘要介绍了一种基于单片机控制的汽车多功能报警系统，它能对汽车的润滑系统油压、制动系统气压、冷却系统温度、轮胎欠压及防盗进行自动检测，并在发现异常情况时，发出声光报警。阐述了该报警系统的硬件组成及软件设计方法。关键词单片机传感器数模转换报警Abstract Am ulti-fimctiona utomobilea larnungs ystemb asedo ns inglec hipc omputerco ntorlis in torducedin th isp aper.Th eo ilpr essuero flu bricatesystem, air pressure of braking system, temperature of cooling system, under pressure of tyre and guard against theft， detected automaticaly场thesystem. Audio and visual alarms wil be provided under abnormal conditions厂The hardware composition and software design of the system， described.Keywords Singlec hipc omputer Sensor Digital-t-oanaloguec onversion Alarmin 汽车多功能报苦器硬件系统设计根据 系 统 实际需要和产品性价比，选用ATMEL公司新生产的采用CMOs工艺的低功耗、高性能8位单片机AT89S52作为系统的控制器。AT89S52的片内有8k Bytes LSP Flash闪烁存储器，可进行100(〕次写、擦除操作;256Bytes内部数据存储器(RAM);3 2 根可编程输N输出线;2个可编程全双工串行通道;看门狗(WTD)电路等。系统由传感器、单片机、模数转换器、无线信号发射电路、指示灯驱动电路、声光报警驱动电KD一9563，发出三声二闪光。并触发一个高电平，驱动无线信号发射电路。
上传时间： 2013-11-09
上传用户：gxmm
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-13
上传用户：瓦力瓦力hong
a8259 可编程中断控制 altera提供 The a8259 is designed to simplify the implementation of the interrupt interface in 8088 and 8086 based microcomputer systems. The device is known as a programmable interrupt controller. The a8259 receives and prioritizes up to 8 interrupts, and in the cascade mode, this can be expanded up to 64 interrupts. An asynchronous reset and a clock input have been added to improve operation and reliability.
上传时间： 2014-11-29
上传用户：zhyiroy
