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Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核，对学习verilog语言和以太网有很大帮助。
The 3850 group (spec.A QzROM version) is the 8-bit microcomputer based on the 740 family core technology.
This GLib version 2.16.1. GLib is the low-level core library that forms the basis for projects such as GTK+ and GNOME. ...
This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, ...
I2C core code in Hardware descrption language so as enable a cpld/fpga to be programmed for specific customized applicat...
The combinatorial core of the OVSF code assignment problem that arises in UMTS is to assign some nodes of a complete bi...
This is is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently suppor...