In higher power applications to utilize the full line power and reduce line currentharmonics
标签： Pre-Regulator Interleaved Design Review
上传时间： 2013-06-04
上传用户：lepoke
eSP268 is a USB 2.0 High-speed (HS) and Full-speed (FS) compatible PC cameracontro
标签： Controller Camera Bridge eSP
上传时间： 2013-06-06
上传用户：ice_qi
随着嵌入式系统的发展、嵌入式应用的不断增长以及嵌入式系统复杂性不断提高，嵌入式软件的规模和复杂性也不断提高。在目前的嵌入式系统开发中间，软件开发占80％以上的工作量，嵌入式软件的质量和开发周期对产品的最终质量和上市时间起到决定性的影响。因此，为了保持产品竞争力，支持用户对嵌入式设备进行快速、高效的软件开发，嵌入式的开发人员迫切需要更加强大的调试技术和手段来为开发复杂的嵌入式应用提供帮助；同时，强有力的嵌入式软件开发工具也是基本的必备条件。 本文结合ARM公司RVDS集成开发环境中调试模块组成部分Event Viewer系统的开发，实现了对通过原始数据源采集到的CoreSight跟踪数据的完整实时解析，并最终在显示模块中将其包含的信息以可视化的形式直观地展现给用户，以供后续的程序性能分析和嵌入式软件系统调试。研究了与本课题相关的一些技术，包括CoreSight调试体系结构、嵌入式常见调试技术、Eclipse平台体系架构及其插件扩展点技术。在研究嵌入式集成开发环境国内外现状及其发展趋势的基础上，结合Event Viewer系统的整体需求，介绍了系统的总体设计及其功能模块划分，并给出了系统的第三方扩展设计。讨论了系统解析模块的设计与实现。在分析CoreSight跟踪数据解析流程的基础上，对系统中解析模块进行了详细设计，并完成了基于ITM数据流的解析实现。结合系统的功能需求和解析模块的设计，本文利用Eclipse插件扩展点机制，划分解析模块提供对外扩展，实现了系统向第三方产品提供商提供扩展接口的功能，第三方可以在此基础上提供自己的解析处理。利用Eclipse View扩展点和SWT/JFace技术，实现了对跟踪数据的前台展示，包括Text、Event、Analog三种类型；本文着重讨论了Analog展示部分的详细设计和实现，将解析后得到的Analog数据信息以实时曲线图的形式展现给客户，提供对Analog数据变化趋势的直观描述。
标签： ARMCoreSight 调试技术
上传时间： 2013-04-24
上传用户：www240697738
Altera公司的EPLD/FPGA开发工具最新版QuartusII9.0的所有License.
标签： QuartusII license Altera full
上传时间： 2013-07-09
上传用户：zttztt2005
使用51单片机控制T35模块收发短信及接听拨打电话等-51 SCM control modules using the send and receive text messages and recei
上传时间： 2013-06-08
上传用户：417313137
The L298 is an integratedmonolithic circuit in a 15- lead Multiwatt and PowerSO20 packages. It is a
标签： FULL-BRIDGE DRIVER l298 DUAL
上传时间： 2013-08-03
上传用户：wendy15
·Stanford&IBM牛人经典之作 - Digital Control of Dynamic SystemsEditorial ReviewsProduct DescriptionThis well-respected, market-leading text discusses the use of digital computers in the real-time co
标签： nbsp Hardcover Digital Control
上传时间： 2013-07-31
上传用户：cuiyashuo
以图片的形式简单，明了的讲解了Proteus中的如何取消TEXT字样。一看就明白。
标签：
上传时间： 2013-09-27
上传用户：tiantwo
Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.
标签： Converters Defini DAC
上传时间： 2013-10-30
上传用户：stvnash
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上传时间： 2013-11-12
上传用户：pans0ul
