MTOOLS version 2.0 Mtools is a public domain collection of programs to allow Unix systems to read, write, and manipulate files on an MSDOS filesystem (typically a diskette). The following MSDOS commands are emulated: Mtool MSDOS name equivalent Description ----- ---- ----------- mattrib ATTRIB change MSDOS file attribute flags mcd CD change MSDOS directory mcopy COPY copy MSDOS files to/from Unix mdel DEL/ERASE delete an MSDOS file mdir DIR display an MSDOS directory mformat FORMAT add MSDOS filesystem to a low-level format mlabel LABEL make an MSDOS volume label. mmd MD/MKDIR make an MSDOS subdirectory mrd RD/RMDIR remove an MSDOS subdirectory mread COPY low level read (copy) an MSDOS file to Unix mren REN/RENAME rename an existing MSDOS file mtype TYPE display contents of an MSDOS file mwrite COPY low level write (copy) a Unix file to MSDOS
标签： collection programs version systems
上传时间： 2016-11-18
上传用户：wlcaption
51单片机C语言多种点阵屏驱动程序（开发软件为keil C ---8字点阵屏左移程序，64_16点阵屏驱动程序，上移显示程序，左移显示程序）51 monolithic integrated circuit C language many kinds of lattice screen driver (develops the software is keil C ---8 character lattice screen left shift procedure, the 64_16 lattice screen driver, uppers shift the display sequence, the left shift display sequence
上传时间： 2014-01-04
上传用户：Ants
EPSON的S1D13A05芯片在VxWorks下的WindML显示驱动源码以及使用说明。S1D13A05是一款使用的非常多的LCD控制及USB协议芯片。 1、S1D13A05_WindML_v2.0_display_Driver是WindML源代码 2、x40ae003 (S1D13A05 WindML v2.0 display Driver User Manual Rev 1.0)是WindML源码的说明文档
标签： S1D13A05 WindML_v VxWorks WindML
上传时间： 2014-01-26
上传用户：jcljkh
X-scale 27x 平台，display driver, 从微软提供的显示驱动移植， 对于学习显示驱动的人很有帮助！
上传时间： 2016-11-28
上传用户：erkuizhang
EVC应用程序，可以直接和display DRIVER通讯，也用与X-SCALE 27X平台。
上传时间： 2016-11-28
上传用户：sevenbestfei
function [U,center,result,w,obj_fcn]= fenlei(data) [data_n,in_n] = size(data) m= 2 ％ Exponent for U max_iter = 100 ％ Max. iteration min_impro =1e-5 ％ Min. improvement c=3 [center, U, obj_fcn] = fcm(data, c) for i=1:max_iter if F(U)>0.98 break else w_new=eye(in_n,in_n) center1=sum(center)/c a=center1(1)./center1 deta=center-center1(ones(c,1),:) w=sqrt(sum(deta.^2)).*a for j=1:in_n w_new(j,j)=w(j) end data1=data*w_new [center, U, obj_fcn] = fcm(data1, c) center=center./w(ones(c,1),:) obj_fcn=obj_fcn/sum(w.^2) end end display(i) result=zeros(1,data_n) U_=max(U) for i=1:data_n for j=1:c if U(j,i)==U_(i) result(i)=j continue end end end
标签： data function Exponent obj_fcn
上传时间： 2013-12-18
上传用户：ynzfm
Process a binary data stream using a communication system that consists of a baseband modulator, channel, and demodulator. Compute the system s bit error rate (BER). Also, display the transmitted and received signals in a scatter plot.
标签： communication modulator baseband consists
上传时间： 2017-01-08
上传用户：ardager
采用VHDL语言设计一个4通道的数据采集控制模块。系统的功能描述如下： 1.系统主时钟为100 MHz。 2.数据为16位-数据线上连续2次00FF后数据传输开始。 3.系统内部总线宽度为8位。 4.共有4个通道（ch1、ch2、ch3、ch4），每个通道配备100 Bytes的RAM，当存满数据后停止数据采集并且相应通道的状态位产生报警信号。 5.数据分为8位串行输出，输出时钟由外部数据读取电路给出。 6.具备显示模块驱动功能。由SEL信号设置显示的通道，display信号启动所选通道RAM中数值的显示过程。数值顺次显示一遍后显示结束，可以重新设定SEL的值选择下一个通道。模块数据线为8位，显示器件为4个8段LED。 7.数据采集模式如下：单通道采集（由SEL信号选择通道），多通道顺次采集（当前通道采满后转入下一通道），多通道并行采集（每通道依次采集一个数据）。模式由控制信号MODE选择，采集数据的总个数由NUM_COLLECT给出。 8.数据采集过程中不能读取，数据读取过程中不能采集
上传时间： 2013-12-25
上传用户：zycidjl
This GUI is an updated and enhanced version of the “StructBrowser” utility submitted to MatLab Central in May 2003. It comes with new interface and an enhanced display. It uses Microsoft TreeView control to display and explore any kind of MatLab structures. The CRC ExploreStruct was designed to expose the contents of the array struct to any depth and plot any of the components. This tool is very useful for programmers using structures in their code
标签： StructBrowser submitted enhanced updated
上传时间： 2017-03-05
上传用户：csgcd001
This paper shows the development of a 1024-point radix-4 FFT VHDL core for applications in hardware signal processing, targeting low-cost FPGA technologies. The developed core is targeted into a Xilinx庐 Spartan鈩?3 XC3S200 FPGA with the inclusion of a VGA display interface and an external 16-bit data acquisition system for performance evaluation purposes. Several tests were performed in order to verify FFT core functionality, besides the time performance analysis highlights the core advantages over commercially available DSPs and Pentium-based PCs. The core is compared with similar third party IP cores targeting resourceful FPGA technologies. The novelty of this work is to provide a lowcost, resource efficient core for spectrum analysis applications.
标签： applications development hardware paper
上传时间： 2013-12-21
上传用户：jichenxi0730
