源码文件
CONSTANT_inst : CONSTANT PORT MAP( result => result_sig );
cpld 源代码
CPLD采用CMOSEPROM、EEPROM、快闪存储器和SRAM等编程技术，从而构成了高密度、高速度和低功耗的可编程逻辑器件。cPCI总线
收录资源 500 份
全站深度检索
共匹配 500 份工程资源
· 第 16 / 50 页
源码文件
LIBRARY ieee; USE ieee.std_logic_1164.all; use ieee.std_logic_arith.all; ENTITY fc IS PORT ( s_clk : IN std_logic; …
源码文件
/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that …
源码文件
library ieee; Use ieee.std_logic_1164.all; Entity csout is port(data:in std_logic_vector(7 downto 0); cs:in std_logic; …
源码文件
dff_8_inst : dff_8 PORT MAP( clock => clock_sig, data => data_sig, q => q_sig );
源码文件
/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that …
源码文件
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; entity rxt is port( mclk_16:in std_logic;--16倍ba…
源码文件
-- megafunction wizard: %LPM_CONSTANT% -- GENERATION: STANDARD -- VERSION: WM1.0 -- MODULE: lpm_constant -- ===============…
源码文件
//刚才是串口发，这里是串口收的程序： #include #include #include #include static HANDLE hComm; static DCB Current_Comm_dcb = {0}; static DCB P…
源码文件
DFF_inst : DFF PORT MAP( clock => clock_sig, data => data_sig, q => q_sig );