ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上传时间： 2013-11-11
上传用户：pans0ul
锁定放大是微弱信号检测的重要手段。基于相关检测理论，利用开关电容的开关实现锁定放大器中乘法器的功能，提出开关电容和积分器相结合以实现相关检测的方法，并设计出一种锁定放大器。该锁定放大器将微弱信号转化为与之相关的方波，通过后续电路得到正比于被测信号的直流电平，为后续采集处理提供方便。测量数据表明锁定放大器前级可将10-6 A的电流转换为10-1 V的电压，后级通过带通滤波器级联可将信号放大1×105倍。该方法在降低噪声的同时，可对微弱信号进行放大，线性度较高、稳定性较好。 Abstract: Lock-in Amplifying（LIA）is one of important means for weak signal detection. Based on cross-correlation detection theory， switch in the swithched capacitor was used as multiplier of LIA， and a new method of correlation detection was proposed combining swithched capacitor with integrator. A kind of LIA was designed which can convert the weak signal to square-wave， then DC proportional to measured signal was obtained through follow-up conditioning circuit， providing convenience for signal acquisition and processing. The measured data shows that the electric current（10-6 A） can be changed into voltage（10-1 V） by LIA， and the signal is magnified 1×105 times by cascade band-pass filter. The noise is suppressed and the weak signal is amplified. It has the advantages of good linearity and stability.
上传时间： 2013-11-28
上传用户：黑漆漆
针对材料试验机等设备中要求测量或控制材料拉伸或压缩的位移，一般采用光电轴角编码器检测位置信号，输出正交编码脉冲信号。若采用其他方法检测位置信号，必然导致电路设计复杂，可靠性降低。因此，提出一种基于LS7266R1的电子式万能材料试验机设计方案。给出了试验机中的控制器工作原理，LS7266R1与单片机的接口硬件设计，以及主程序软件流程图。巧妙地把力量传感器，位移传感器等机械运动状态的压力或拉力以及位置坐标，变成了电压信号和电脉冲数字信号，供A/D测量和LS7266R1计数，从而实现了独立完成材料试验控制或通过PC机串口命令完成材料试验控制。 Abstract: Aiming at the requirement that the displacement of the tension and compression always be tested and controlled in the equipement such as material testing machine. The position signal was tested by photoelectric axial angle coder. Therefore， the paper proposes the design of electronic universal testing machine design based on LS7266R1. If the position signal detected by other methods， will inevitably lead to the circuit design complexity， reliability decreased. The work theory of the controller， the hardware interface design between LS7266R1 and single chip， and the flow chart of main program， are presented in this paper. The signal of the compression or tension power and displacement at working， which tested by power sensor and displacement sensor especially， is changed into electric voltage and electric pulse numerical signals. And these signals can be tested by A/D and counted by LS7266R1. Finally the test of the material properties can be controlled by itself， or controlled by the COM command of PC.
上传时间： 2013-11-01
上传用户：yl1140vista
将现行的供暖计费方式由按建筑面积计费变为按消耗的热能计费是供暖计费方式发展趋势，为了满足这一计费方式变化的需要，设计了基于IC卡的预付费式新型供暖计费系统，通过测量用户采暖系统进出口的温度和流量，计算用户消耗的热能，利用IC卡记录用户预付费的金额和当年热能的单价，根据热能消耗和当年热能的单价计算用户采暖费，根据实际发生的供暖费用和预付费金额控制供暖的开停，这一计费方式的变化使供暖计费更趋合理。 Abstract: It is trend that the mode of heat charging is changed from billing by building area to by thermal energy. In order to meet the needs of heat charging mode changing， a new system of heat charging based on IC card is proposed. The user?蒺s energy consumption is calculated by measuring the user inlet and outlet temperature and flow，using the IC card to record the prepaid amount and the current price of heat. The user?蒺s heating costs is calculated according to energy consumption and current price， according to actual heating costs and prepaid amount，the system controls the heating opening or stopping. It is more reasonable that calculated heating costs by user heat consumption
上传时间： 2013-10-14
上传用户：大融融rr
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上传时间： 2013-10-14
上传用户：euroford
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development
标签： Methodology Design Reuse FPGA
上传时间： 2013-10-23
上传用户：旗鱼旗鱼
We all know the benefits of using FieldProgrammable Gate Arrays (FPGAs): no NRE, nominimum order quantities, and faster time-tomarket.In an ideal world, designs would never needto be changed because of design errors, but we allknow that sometimes this is necessary.
上传时间： 2013-11-03
上传用户：leixinzhuo
This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.
上传时间： 2014-11-26
上传用户：erkuizhang
FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level Integration (SLI). Plus, the development
标签： Methodology Design Reuse FPGA
上传时间： 2013-11-01
上传用户：shawvi
Filename: main.c * Description: A simple test program for the CRC implementations. * Notes: To test a different CRC standard, modify crc.h. * * * Copyright (c) 2000 by Michael Barr. This software is placed into * the public domain and may be used for any purpose. However, this * notice must not be changed or removed and no warranty is either * expressed or implied by its publication or distribution.
标签： test implementations Description Filename
上传时间： 2015-02-02
上传用户：leehom61
