--mux2 library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; entity mux2 …
architecture 源代码
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-- seealarm, conctrol displaying the alarm modle Library IEEE; use IEEE.std_logic_1164.all; entity seealarm is port(en:in st…
--or2 library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; entity or2 is…
--nor2 library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; entity nor2 …
--or2 library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; entity or2 is…
--nor2 library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; use IEEE.std_logic_arith.all; entity nor2 …
Library IEEE ; use IEEE.std_logic_1164.all ; ENTITY reg4 IS PORT( d:in std_logic_vector(3 downto 0); ci: IN std_logi…
Library IEEE ; use IEEE.std_logic_1164.all ; ENTITY reg8 IS PORT( d_1:in std_logic_vector(3 downto 0); d_2:in std_lo…
Library IEEE ; use IEEE.std_logic_1164.all ; ENTITY reg4_1 is PORT(d:in std_logic_vector(3 downto 0); clk : IN std_l…
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity myand1 is po…