altium design

Trinity Convergence VeriCall Software Design Trinity SIP协议栈架构

Trinity Convergence VeriCall Software Design Trinity SIP协议栈架构

标签： Trinity Convergence Software VeriCall

上传时间： 2014-11-26

上传用户：wyc199288
Very useful document to understand SI and SP frame design in H.264.

Very useful document to understand SI and SP frame design in H.264.

标签： understand document useful design

上传时间： 2014-01-03

上传用户：colinal
simulation for design ananlog circuit

simulation for design ananlog circuit

标签： simulation ananlog circuit design

上传时间： 2015-12-09

上传用户：tianyi223
fpga design flow from Xilinx

fpga design flow from Xilinx

标签： design Xilinx fpga flow

上传时间： 2015-12-09

上传用户：luopoguixiong
IPCAM Design document based on TI DaVinci

IPCAM Design document based on TI DaVinci

标签： document DaVinci Design IPCAM

上传时间： 2013-12-26

上传用户：songrui
this the AVR lib who used to design the project for AVR chips

this the AVR lib who used to design the project for AVR chips

标签： the AVR project design

上传时间： 2015-12-10

上传用户：jing911003
温度控制系统原程序.要用altium designer 6.X打开

温度控制系统原程序.要用altium designer 6.X打开

标签： Designer Altium 温度控制系统程序

上传时间： 2013-12-29

上传用户：hj_18
JTAG design verilog code.

JTAG design verilog code.

标签： verilog design JTAG code

上传时间： 2014-07-30

上传用户：wys0120
基于DDS的信号发生器的设计与开发 The Design and Development of Function Generator Based on DDS

基于DDS的信号发生器的设计与开发 The Design and Development of Function Generator Based on DDS

标签： Development DDS Generator Function

上传时间： 2014-01-03

上传用户：stewart·
To increase simulation speed, ModelSim® can apply a variety of optimizations to your design. Thes

To increase simulation speed, ModelSim® can apply a variety of optimizations to your design. These include, but are not limited to, mergingprocesses, pulling constants out of loops, clock suppression, and signal collapsing. You control the level of optimization by specifying certain switches when you invoke the compiler.

标签： optimizations simulation ModelSim increase

上传时间： 2013-12-25

上传用户：pkkkkp