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找到约 12 项符合 XINLIX 的查询结果

软件设计/软件工程 该文档是有关利用XINLIX的FPGA如何实现FIFO的生成及如何应用的文章。

该文档是有关利用XINLIX的FPGA如何实现FIFO的生成及如何应用的文章。
https://www.eeworm.com/dl/684/262628.html
下载: 176
查看: 1058

VHDL/FPGA/Verilog UART参考设计带缓存用于Xinlix用于FPGA

UART参考设计带缓存用于Xinlix用于FPGA
https://www.eeworm.com/dl/663/265905.html
下载: 33
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VHDL/FPGA/Verilog it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8

it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
https://www.eeworm.com/dl/663/418188.html
下载: 132
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VHDL/FPGA/Verilog it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have

it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.
https://www.eeworm.com/dl/663/418189.html
下载: 22
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VHDL/FPGA/Verilog it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix

it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
https://www.eeworm.com/dl/663/418190.html
下载: 197
查看: 1073

VHDL/FPGA/Verilog 此为在xinlix系统上开发的PS通信程序

此为在xinlix系统上开发的PS通信程序,用VHDL语言开发
https://www.eeworm.com/dl/663/470958.html
下载: 176
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学术论文 基于FPGA的高频数字DCDC变换器研究

在传统的电力电子电路中,DC/DC变换器通常采用模拟电路实现电压或电流的控制。数字控制与模拟控制相比,有着显著的优点,数字控制可以实现复杂的控制策略,同时大大提高系统的可靠性和灵活性,并易于实现系统的智能化。但目前数字控制基本上限于电力传动领域,DC/DC变换器由于其开关频率较高,一般其外围功能由DSP或微处理 ...
https://www.eeworm.com/dl/514/12483.html
下载: 30
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教程资料 Xinlix ISE快速入门详细教程_青山紫木原创

这是一篇很好的ISE入门资料,花了本人3个小时才写完。对新手来说,只要按本文走,10分钟就可以入门。
https://www.eeworm.com/dl/fpga/doc/32058.html
下载: 141
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可编程逻辑 Xinlix ISE快速入门详细教程_青山紫木原创

这是一篇很好的ISE入门资料,花了本人3个小时才写完。对新手来说,只要按本文走,10分钟就可以入门。
https://www.eeworm.com/dl/kbcluoji/38732.html
下载: 58
查看: 1047

VHDL/FPGA/Verilog it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in x

it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
https://www.eeworm.com/dl/663/418184.html
下载: 138
查看: 1050